Front cover image for Architecture of Computing Systems ARCS 2008 : 21st International Conference, Dresden, Germany, February 25-28, 2008. Proceedings

Architecture of Computing Systems ARCS 2008 : 21st International Conference, Dresden, Germany, February 25-28, 2008. Proceedings

This book constitutes the refereed proceedings of the 21st International Conference on Architecture of Computing Systems, ARCS 2008, held in Dresden, Germany, in February 2008. The 19 revised full papers presented together with 2 keynote papers were carefully reviewed and selected from 47 submissions. The papers cover a wide spectrum reaching from pre-fabrication adaptation of architectural templates to dynamic run-time adaptation of deployed systems with special focus on adaptivity and adaptive system architectures. The papers are organized in topical sections on hardware design, pervasive computing, network processors and memory management, reconfigurable hardware, real-time architectures, organic computing, and computer architecture
eBook, English, 2008
Springer-Verlag Berlin Heidelberg, Berlin, Heidelberg, 2008
1 online resource
9783540781523, 9783540781530, 3540781528, 3540781536
759004521
Printed edition:
Invited Program
Keynote: Grand Challenges of Computer Engineering
Keynote: The Impact of Operating Systems on Modern CPU Designs (and Vice Versa)
I Hardware Design
System Level Simulation of Autonomic SoCs with TAPES
Topology-Aware Replica Placement in Fault-Tolerant Embedded Networks
Design of Gate Array Circuits Using Evolutionary Algorithms
II Pervasive Computing
Direct Backtracking: An Advanced Adaptation Algorithm for Pervasive Applications
Intelligent Vehicle Handling: Steering and Body Postures While Cornering
III Network Processors and Memory Management
A Hardware Packet Re-Sequencer Unit for Network Processors
Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-master Environment
IV Reconfigurable Hardware
Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks
Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication
A Novel Routing Architecture for Field-Programmable Gate-Arrays
V Real-Time Architectures
A Predictable Simultaneous Multithreading Scheme for Hard Real-Time
Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation
A Hardware/Software Codesign of a Co-processor for Real-Time Hyperelliptic Curve Cryptography on a Spartan3 FPGA
VI Organic Computing
A Reference Architecture for Self-organizing Service-Oriented Computing
Towards Self-organising Smart Camera Systems
Using Organic Computing to Control Bunching Effects
VII Computer Architecture
A Generic Network Interface Architecture for a Networked Processor Array (NePA)
Constructing Optimal XOR-Functions to Minimize Cache Conflict Misses
Potentials of Branch Predictors: From Entropy Viewpoints