VLSI-SoC, research trends in VLSI and systems on chip : Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France
International Federation for Information Processing The IFIP series publishes state-of-the-art results in the sciences and technologies of information and communication. The scope of the series includes: foundations of computer science; software theory and practice; education; computer applications in technology; communication systems; systems modeling and optimization; information systems; computers and society; computer systems technology; security and protection in information processing systems; artificial intelligence; and human-computer interaction. Proceedings and post-proceedings of referred international conferences in computer science and interdisciplinary fields are featured. These results often precede journal publication and represent the most current research. The principal aim of the IFIP series is to encourage education and the dissemination and exchange of information about all aspects of computing. For more information about the 300 other books in the IFIP series, please visit www.springer.com. For more information about IFIP, please visit www.ifip.org
Congress
1 online resource (x, 397 pages) : illustrations
9780387749099, 9780387749082, 9786611338213, 0387749098, 038774908X, 6611338217
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Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits
Oversampled Time Estimation Techniques for Precision Photonic Detectors
Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices
Electronic Detection of DNA Adsorption and Hybridization
Probabilistic amp; Statistical Design
the Wave of the Future
A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs
Probabilistic Design: A Survey of Probabilistic CMOS Technology and Future Directions for Terascale IC Design
Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design
Soft Error Resilient System Design through Error Correction
Library Compatible Variational Delay Computation
A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures
Frequency and Speed Setting for Energy Conservation in Autonomous Mobile Robots
Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation
Logic Synthesis of EXOR Projected Sum of Products
A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits
CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization
Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation
Comparison of an Æthereal Network on Chip and Traditional Interconnects
Two Case Studies
Designing Routing and Message-Dependent Deadlock Free Networks on Chips
Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model
Human++: Emerging Technology for Body Area Networks