The Designer's Guide to VHDL

Pirmais vāks
Morgan Kaufmann, 2010. gada 7. okt. - 936 lappuses
VHDL, the IEEE standard hardware description language for describing digital electronic systems, has recently been revised. The Designer's Guide to VHDL has become a standard in the industry for learning the features of VHDL and using it to verify hardware designs. This third edition is the first comprehensive book on the market to address the new features of VHDL-2008.
  • First comprehensive book on VHDL to incorporate all new features of VHDL-2008, the latest release of the VHDL standard
  • Helps readers get up to speed quickly with new features of the new standard
  • Presents a structured guide to the modeling facilities offered by VHDL
  • Shows how VHDL functions to help design digital systems
  • Includes extensive case studies and source code used to develop testbenches and case study examples
  • Helps readers gain maximum facility with VHDL for design of digital systems
 

Atlasītās lappuses

Saturs

Chapter 1 Fundamental Concepts
1
Chapter 2 Scalar Data Types and Operations
31
Chapter 3 Sequential Statements
65
Chapter 4 Composite Data Types and Operations
95
Chapter 5 Basic Modeling Constructs
137
Chapter 6 Subprograms
207
Chapter 7 Packages and Use Clauses
245
Chapter 8 Resolved Signals
267
Chapter 16 Files and InputOutput
499
A Package for Memories
535
Chapter 18 Test Bench and Verification Features
559
Chapter 19 Shared Variables and Protected Types
585
Chapter 20 Attributes and Groups
603
Chapter 21 Design for Synthesis
633
System Design Using the Gumnut Core
669
Chapter 23 Miscellaneous Topics
733

Chapter 9 Predefined and Standard Packages
293
A Pipelined Multiplier Accumulator
337
Chapter 11 Aliases
355
Chapter 12 Generics
365
Chapter 13 Components and Configurations
417
Chapter 14 Generate Statements
449
Chapter 15 Access Types
479
Standard Packages
793
VHDL Syntax
841
Answers to Exercises
859
References
889
Index
891
Autortiesības

Citi izdevumi - Skatīt visu

The Designer's Guide to VHDL
Peter J. Ashenden
Ierobežota priekšskatīšana - 2010
The Designer's Guide to VHDL
Peter J. Ashenden
Fragmentu skats - 2008

Bieži izmantoti vārdi un frāzes

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Par autoru (2010)

Peter J. Ashenden received his B.Sc.(Hons) and Ph.D. from the University of Adelaide, Australia. He was previously a senior lecturer in computer science and is now a Visiting Research Fellow at the University of Adelaide. His research interests are computer organization and electronic design automation. Dr. Ashenden is also an independent consultant specializing in electronic design automation (EDA). He is actively involved in IEEE working groups developing VHDL standards, is the author of The Designer's Guide to VHDL and The Student's Guide to VHDL and co-editor of the Morgan Kaufmann series, Systems on Silicon. He is a senior member of the IEEE and a member of the ACM.

Bibliogrāfiskā informācija

NosaukumsThe Designer's Guide to VHDL
AutorsPeter J. Ashenden
Izdevums:3
IzdevējsMorgan Kaufmann, 2010
ISBN0080568858, 9780080568850
Apjoms936 lappuses
  
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