Front cover image for Embedded computer systems : architectures, modeling, and simulation : 7th international workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007 : proceedings

Embedded computer systems : architectures, modeling, and simulation : 7th international workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007 : proceedings

Stamatis Vassiliadis established the SAMOS workshop in the year 2001--an event which combines his devotion to computer engineering and his pride for Samos, the island where he was born. The quiet and inspiring northern mo- tainside of this Mediterranean island together with his enthusiasm and warmth created a unique atmosphere that made this event so successful. Stamatis V- siliadis passed away on Saturday, April 7, 2007. The research community wants to express its gratitude to him for the creation of the SAMOS workshop, which will not be the same without him. We would like to dedicate this proceedings volume to the memory of Stamatis Vassiliadis. The SAMOS workshop is an international gathering of highly quali?ed - searchers from academia and industry, sharing their ideas during a 3-day lively discussion. Theworkshopmeetingisoneoftwocolocatedevents--theotherevent being the IC-SAMOS. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved pr- lems and in-depth topical reviews can be unleashed in the scienti?c arena. C- sequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered
eBook, English, ©2007
Springer, Berlin, ©2007
Congress
1 online resource (xvii, 466 pages) : illustrations
9783540736257, 9783540736226, 3540736255, 3540736220
184920529
Keynotes
Software Is the Answer But What Is the Question?
Integrating VLIW Processors with a Network on Chip
System Modeling and Simulation
Communication Architecture Simulation on the Virtual Synchronization Framework
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration
SC2SCFL: Automated SystemC to Translation
VLSI Architectures
Model and Validation of Block Cleaning Cost for Flash Memory
VLSI Architecture for MRF Based Stereo Matching
Low-Power Twiddle Factor Unit for FFT Computation
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors
Scheduling & Programming Models
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code
Improving TriMedia Cache Performance by Profile Guided Code Reordering
A Streaming Machine Description and Programming Model
Multi-processor Architectures
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing
Strategies for Compiling?TC to Novel Chip Multiprocessors
Image Quantisation on a Massively Parallel Embedded Processor
Stream Image Processing on a Dual-Core Embedded System
Reconfigurable Architectures
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder
Evaluating Large System-on-Chip on Multi-FPGA Platform
Design Space Exploration
Efficiency Measures for Multimedia SOCs
On-Chip Bus Modeling for Power and Performance Estimation
A Framework Introducing Model Reversibility in SoC Design Space Exploration
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration
Processor Components
Resource Conflict Detection in Simulation of Function Unit Pipelines
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing
High-Bandwidth Address Generation Unit
An IP Core for Embedded Java Systems
Embedded Processors
Parallel Memory Architecture for TTA Processor
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction
A Study of Energy Saving in Customizable Processors
SoC for SDR
Trends in Low Power Handset Software Defined Radio
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals
Area Efficient Fully Programmable Baseband Processors
The Next Generation Challenge for Software Defined Radio
Design Methodology for Software Radio Systems
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC
A Comparative Study of Different FFT Architectures for Software Defined Radio
Wireless Sensors
Design of 100?W Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks
SensorOS: A New Operating System for Time Critical WSN Applications
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks
k?+? Neigh: An Energy Efficient Topology Control for Wireless Sensor Networks