Fine- and Coarse-Grain Reconfigurable ComputingStamatis Vassiliadis, Dimitrios Soudris Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. |
No grāmatas satura
6.–10. rezultāts no 71.
... programmable connection whose impedance changes on the application of a high voltage. In the un-programmed state ... Field-Programmable Gate Arrays. This environment places stress on the energy efficiency of FPGAs, which is still 1 A ...
... field-programmable gate array- like device that can implement application specific operations. The Chimaera system is capable of collapsing a set of instructions into RFU operations, converting control-flow into RFU operations, and ...
... field-programmable gate array (FPGA). The architecture was developed using a methodology that examines dif- ferent architectural parameters and how they affect different performance criteria such as speed, area, and reconfiguration time ...
... Field-Programmable Gate Arrays is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic ap- plications. The eight-member family offers densities ranging from 50,000 to five million system gates. The ...
Esat sasniedzis šīs grāmatas aplūkošanas reižu limitu.
Saturs
3 | |
A Survey of CoarseGrain Reconfigurable Architectures and | 89 |
Amdrel | 153 |
A CoarseGrain Dynamically Reconfigurable System | 181 |
Polymorphic Instruction Set Computers | 217 |
Architecture and Compiler for CoarseGrain | 255 |
A Taxonomy of FieldProgrammable Custom Computing Machines | 299 |
Index | 379 |
Citi izdevumi - Skatīt visu
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Ierobežota priekšskatīšana - 2007 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2008 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2014 |