Architecture Exploration for Embedded Processors with LISA

Pirmais vāks
Springer Science & Business Media, 2002. gada 30. nov. - 230 lappuses
Today more than 90% of all programmable processors are employed in embedded systems. This number is actually not surprising, contemplating that in a typical home you might find one or two PCs equipped with high-performance standard processors, and probably dozens of embedded systems, including electronic entertainment, household, and telecom devices, each of them equipped with one or more embedded processors. The question arises why programmable processors are so popular in embedded system design. The answer lies in the fact that they help to narrow the gap between chip capacity and designer productivity. Embedded processors cores are nothing but one step further towards improved design reuse, just along the lines of standard cells in logic synthesis and macrocells in RTL synthesis in earlier times of IC design. Additionally, programmable processors permit to migrate functionality from hardware to software, resulting in an even improved reuse factor as well as greatly increased flexibility. The LISA processor design platform (LPDP) presented in Architecture Exploration for Embedded Processors with LISA addresses recent design challenges and results in highly satisfactory solutions. The LPDP covers all major high-level phases of embedded processor design and is capable of automatically generating almost all required software development tools from processor models in the LISA language. It supports a profiling-based, stepwise refinement of processor models down to cycle-accurate and even RTL synthesis models. Moreover, it elegantly avoids model inconsistencies otherwise omnipresent in traditional design flows. The next step in design reuse is already in sight: SoC platforms, i.e., partially pre-designed multi-processor templates that can be quickly tuned towards given applications thereby guaranteeing a high degree of hardware/software reuse in system-level design. Consequently, the LPDP approach goes even beyond processor architecture design. The LPDP solution explicitly addresses SoC integration issues by offering comfortable APIs for external simulation environments as well as clever solutions for the problem of both efficient and user-friendly heterogeneous multiprocessor debugging.

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Saturs

Preface
8
TRADITIONAL ASIP DESIGN METHODOLOGY
11
PROCESSOR MODELS FOR ASIP DESIGN
31
LISA PROCESSOR DESIGN PLATFORM
48
ARCHITECTURE EXPLORATION
57
1
79
14
94
SOFTWARE TOOLS FOR APPLICATION DESIGN
101
SUMMARY AND OUTLOOK
143
Appendices
149
29
173
30
199
List of Figures
203
List of Tables
209
43
213
About the Authors
225

SYSTEM INTEGRATION AND VERIFICATION
129
26
131

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Populāri fragmenti

214. lappuse - A. Halambi, P. Grun, V. Ganesh, A. Khare, N. Dutt, and A. Nicolau, EXPRESSION: A language for architecture exploration through compiler/simulator retargetability, In Proceedings of the Conference on Design, Automation and Test in Europe (DATE) 1999, March 1999, pp.
214. lappuse - A. Kitajima, M. Itoh, J. Sato, A. Shiomi, Y. Takeuchi, and M. Imai. Effectiveness of the ASIP Design System PEAS-III in Design of Pipelined Processors.
222. lappuse - Dutt and A. Nicolau. EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. In Proc. of the Conference on Design, Automation & Test in Europe (DATE), Mar. 1999.
219. lappuse - Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language,
218. lappuse - Instruction Set Processor Specifications (ISPS): The Notation and Its Application," IEEE Transactions on Computers, Vol. C-30, No. 1, January 1981, pp. 24-40.

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