CODES+ISSSACM Press, 2003 |
No grāmatas satura
1.–3. rezultāts no 68.
52. lappuse
... Computer Science at Stanford . The two main projects in his group , Collaborative Sensing and Smart Matter Diagnostics , investigate how MEMS sensor and networking technology can change the way we build and interact with physical ...
... Computer Science at Stanford . The two main projects in his group , Collaborative Sensing and Smart Matter Diagnostics , investigate how MEMS sensor and networking technology can change the way we build and interact with physical ...
90. lappuse
... [ Computer- aided Engineering ] : Computer - aided design ( CAD ) General Terms Algorithms , Design Keywords System - Level Design , Heterogeneous Embedded Systems , Kahn Process Networks , Weakly Dynamic Applications 1. INTRODUCTION ...
... [ Computer- aided Engineering ] : Computer - aided design ( CAD ) General Terms Algorithms , Design Keywords System - Level Design , Heterogeneous Embedded Systems , Kahn Process Networks , Weakly Dynamic Applications 1. INTRODUCTION ...
161. lappuse
... computer- computer networking , as discussed in section 2. Figure 10 shows one way the central controller ( PE 1 ) might set up the cooperation of the remaining PEs in the system when the PDA is acting as a cell phone in the middle of a ...
... computer- computer networking , as discussed in section 2. Figure 10 shows one way the central controller ( PE 1 ) might set up the cooperation of the remaining PEs in the system when the PDA is acting as a cell phone in the middle of a ...
Saturs
An Efficient Retargetable Framework for InstructionSet Simulation | 13 |
Extending the SystemC Synthesis Subset by ObjectOriented Features | 25 |
Hardware Support for Realtime Operating Systems | 45 |
Autortiesības | |
19 citas sadaļas nav parādītas.
Citi izdevumi - Skatīt visu
Bieži izmantoti vārdi un frāzes
abstraction adiabatic circuits algorithm analysis application approach architecture behavior buffer bytecode cache blocks cache line channel chip clock Codesign communication components computation configuration constraints core cycle decoder defined delay design space exploration device device driver DRAM DRAM row dynamic EMAC embedded systems encoder energy error estimation event example execution FIFO flash memory function global hardware IEEE implementation input instruction interface iteration Kahn Process Network latency logic minimization loop M-JPEG mapping methodology module multiple NAND Nash equilibrium Newport Beach node on-chip on-memory cache optimization output overhead packet parallel parameters partitioning performance priority Proc process network processor protocol real-time retiming RTOS model RTPN scheduling Section shown in Figure simulation solution specification speech recognition static step synchronization synthesis system level SystemC Table task graphs TCP/IP technique Technology tion TLMs tool VHDL virtual VLIW wires