Lapas attēli
PDF
ePub

FAIR REVERSE ENGINEERING

O THIS IS EQUIVALENT TO WRITING A COPYRIGHTED BIOGRAPHY.
A SECOND WRITER CAN WRITE A BIOGRAPHY ON THE SAME PERSON
AS LONG AS IT IS EXPRESSED IN A DIFFERENT MANNER.

O STUDY THE OPERATION AND DESIGN OF THE CHIP.

O IMPLEMENT THE SAME ELECTRONIC FUNCTIONS BUT USING
DIFFERENT PATTERNS.

O REDUCE THE COST AND/OR IMPROVE THE PERFORMANCE OF THE CHIP.

O REVERSE ENGINEERING MAY COST 25% OF THE ORIGINAL DESIGN BUT IT ALSO ADVANCES THE STATE OF THE ART.

0

IT IS THE EXPRESSION WHICH SHOULD BE PROTECTED NOT THE
UNDERLYING CIRCUIT CONCEPTS.

TYPICAL DEVELOPMENT COSTS

O TYPICAL COST OF A COMPLETE FAMILY OF CHIPS = $80M

[blocks in formation]

O ON GOING R & D COST ABOUT $10M PER YEAR.

0 REVERSE ENGINEERING OF THE MAIN CHIP WOULD COST ABOUT $1M. WE CAN LIVE WITH THIS.

O PHOTOGRAPHIC COPY OF THE MAIN CHIP WOULD ONLY COST ABOUT $100,000.

O THE PIRATE HAS MINIMAL R & D COSTS AND VIRTUALLY NO
MARKET DEVELOPMENT COSTS. PRICE IS HIS ONLY WEAPON.

[graphic][merged small][merged small][merged small][merged small]

When the IEEE Computer Society was founded twentyfive years ago, the transistor was a laboratory curiosity. and operating computers were assembled from relays or vacuum tubes. Today, a single integrated circuit far surpasses the capability of those early computers, and further progress seems inevitable. The development of semiconductor devices has depended upon a synergism with computers. This is particularly true for integrated circuits, whose development was motivated by the computer applications. With each advance in components, the computers resulting from their use reached a wider market, motivating further advances in the semiconductor technology.

Improvements in cost, reliability, and performance were the major objectives of the component development programs. Each has been improved by higher levels of complexity of integrated circuits. In assessing whether this technology is entering its maturity or its dotage, we should ask if significant additional improvements can be made in these three factors.

Costs

After design has been amortized, the production costs are made up of two basic elements: first that of the active element (today, usually silicon) and then assembly and test costs. The silicon chip cost is dependent upon the processing cost per chip and the yield of good chips. There is a limit to the size of the silicon chip which may be made with practical yield. A simple model would say that if a given size chip yielded only 10% good chips due to the inclusion of random defects, then a chip twice as large would yield only 1% good chips. (Actually the situation is not this bad, since defects are not randomly distributed.) The cost for twice the function then would be 20 times as great twice the processing cost since twice the area of silicon is used, and 10 times the cost due to loss of yield). Clearly, if the cost of the active silicon is dominant, such a doubling of complexity would not be cost-effective, and cred to an extreme, the single transistor is the most cost effective (See Figure 1)

[blocks in formation]

The other major cost element borne by the component manufacturer is that of assembling and testing the devices. Assembly is the process of putting the tiny silicon active element in a housing which includes a mechanical transition from the microscopic interconnections included in the integrated circuit to the sizes normally encountered in electronic equipment-1.e., lead separation of 10 microns to lead separation of 2500 microns or 2.5 mm respectively. As a first approximation, assembly costs are independent of the function included on the integrated circuit chip. although they will increase somewhat with the increasing number of electrical connections to large chips. Similarly, test costs increase much more slowly than the complexity of the chip being tested, although very sophisticated test equipment is required to achieve this result.

Thus, the total cost per function will be made up of two elements, one increasing with complexity of the general form ae, representing the cost of the silicon chip, and another of the form e N representing the cost of assembly and test, where N is the number of functions included.

This cost will have a minimum, as ind testi, nire 1 As processes for manufacturing integrate as have been perfected and yields of good circuits have been improved, this minimum cost point has moved to circunts of higher complexity. It has been the strategy of the semiconductor device manufacturers to suppls circuits which are near this minimum at any given tin

An examination of the integrated circuits offered by the industry as a function of time provides an approxi mation of how the minimum cost point has moved up with time, even though a particular product offering will occur somewhat before that product is cost-effective. The minimum cost/function point has been moving up in complexity, doubling every year since the introduction of the integrated circuit (as indicated in Figure 2). If the present rates of increase of complexity were to continue, integrated circuits with 10 elements would be available in 20 years!

This increase in complexity has resulted in a cost savings in the subsequent assembly into computer hardware as well, since more of the total interconnections are made within the semiconductor components. Other advantages have also accrued. Because equipment can be made smaller, speeds can be improved, costs of cabinets and cables reduced, and total power and cooling requirements reduced.

[blocks in formation]

Performance

As dimensions decrease, all the device parameters change in a favorable direction. This can be seen by noting how the transistor parameters change with dimension, maintaining internal fields, which are limited by avalanche breakdown or, at lower voltages, quantum mechanical tunnelling. The parameters change as follows:

operating voltages will vary as x, the characteristic dimension.

charge densities will vary as 1/x; device current will vary as x;

power density will be constant;

the characteristic impedance will be constant:

circuit delay times due to capacitive charging will vary

as x;

device transit times will vary as x;

iR drops along interconnections are constant.

The fundamental limit which will be encountered is the requirement that significant nonlinearity is required in digital circuits for stability. This condition requires that the logic voltage swings (AV) be large compared to KT/q. Assuming 300 operations, AV 0.025 volts.

Thus, the signal levels of common logic forms can be reduced by a factor of approximately 10 before encountering this limit. A corresponding decrease in characteristic dimensions is implied with a circuit density increase of 100. Interconnect voltage drops, not a significant problem in most circuits today, will have to be improved by a smaller factor, depending on the circuit forms.

Futures

Cost, reliability, and performance all improve with smaller devices and higher levels of integration. Device size is determined by the smallest practical line widths. while the economical level of integration depends upon this factor and the practical size of silicon chips.

The minimum average dimension used in IC's is shown in Figure 3. plotted as a function of time. Production technology has moved quickly from the pre-1960 dimension of 100 microns to the 10-micron range following the introduction of photolithography as a method of defining the geometry of transistors. Steady improvement has been made since that time as equipment and methods have been improved. Recent production technology can utilize 4-micron widths, and laboratory work involves significantly smaller dimensions. These widths also define not only the size of interconnection patterns but also the source

Figure 2. Circuit complexity vs. time of introduction.

Reliability

The interconnections within the integrated circuit have proven to be more reliable than the next level of interconnections, such as solder joints, or connectors. The reliability of the individual integrated circuit at time of introduction has remained nearly constant, independent of its complexity, resulting in a drastic reduction in failure rate on a per-function basis, as more complex circuits have been made available. Further improvement has been made by the reduction of the number of the less reliable solder joints and connectors. Even higher levels of integration can be expected to yield additional reliability dividends.

[merged small][merged small][ocr errors][merged small][ocr errors][merged small][merged small][merged small][merged small][merged small]

drain spacing in MOS transistors and the emitter-base contact spacing in bipolar transistors, which in turn are primary determinants of the performance of these

transistors.

Minimum dimensions will continue to decrease but at a decreasing rate as optical limits are approached, reaching 2 microns in 5 years, and 1 micron in 15 years. Scaling arguments show that speed should then increase by 4 times by 1991.

Die size limitations are set by the economics of "yield." Many circuits are made, the defective ones are thrown away, and the good ones are sold. Defects can arise from many sources. The photomasks used may have pin holes in dark areas, or opaque specks in areas which should be clear. Severe defects in the basic silicon crystal can make the circuit inoperative. Dust in the photoprinting operation or other processing steps, which affects a critical spot in the circuit will cause failures. Errors of misaligning successive photoengraving steps, or of lack of control of critical dimensions and impurity concentration will make the circuit inoperative. The cor rection and elimination of these defects is a difficult task. and represents a major portion of the effort and expense of semiconductor device development and production. However, there is no indication that any fundamental limit exist. Progress continues at a rate which is advantageous and can be economically justified. If defect densities are reduced as they have been in the past, chip sizes will increase by 3 times in 5 years, and 25 times in 15 years, as shown in Figure 4.

[merged small][merged small][merged small][ocr errors][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small]

As a result of these factors, components providing 65 to 131 kilobits of memory with access time of 100 ns should appear in 1981 and the megabit memory chip (220 bits) should appear ten years later. The use of redundancy could accelerate these times. These components should cost little more than today's memory components, or 10-34 per bit.

For non-iterated circuits such as control logic, the level of integration will be lower due to inherent inefficiencies in packing random logic. However, the levels which could be achieved in five years would be approxi mately 25,000 gates, and in 10 years about 250,000 gates. These numbers exceed the gate count of today's medium and large processors, respectively. Internal gate delays of these systems would be comparable to those of today's high speed computers. If the amortization of design costs could be neglected, such logic arrays could be produced for less than $100, or a cost of less than 0.4 per gate in five years and less than 0.04 per gate in 15 years. (See For Sa

[merged small][merged small][merged small][merged small][ocr errors][ocr errors][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small]

It is perhaps obvious that with the increasing complexity of integrated circuits the design cost has been increasing. Although computer-aided design is utilized more and more widely, the cost of design of a new microprocessor is orders of magnitude more expensive than the design of a quad gate. Yet for many applications, the overall design costs can be lower, since component design includes many of the costs previously part of the equipment design. This is particularly true where the cost of the design of one microcomputer n be shared by many different applications.

The microcomputer thus serves as an example of a way out of the dilemma which the components industry encountered as LSI was becoming economically feasible. With increasing complexity the number of possible unique circuits increases enormously, and the cost of design of each increases enormously. Thus, only high-volume applications for which the design costs were small compared to the production costs could utilize this new technology. Early applications were then limited to calculators or semiconductor memories. The advent of the microprocessor unit, or MPU, neatly sidesteps this issue by leaving the uniqueness for the individual application in an area where flexibility is easy to achieve-in software or memory. Although software cost came as an unexpected expense to the components industry, it is still far less than the cost of individual design of unique circuits for each application. Furthermore, undertaking the cost of design of the MPU is less risky, with many potential applications, its market success does not depend on the success of a single program.

Improvement in production techniques of the MPU will result naturally from the high-volume production of semiconductor memories. The complexity of the MPU can be expected to follow that of semiconductor memories with a time lag of a year or two needed for architectural and logic design of the more complex MPU. The eventual cost, if large markets are developed, will be no more than any LSI circuit of similar size and complexity, after amortization of design and software cost.

The implications of this cost decline for sophisticated computing power are enormous. We have had a glimpse of the changes which can be expected from the development of the calculator market. Ten years ago it would have been difficult to predict that the calculator would displace the slide rule. Today, it is equally as difficult to predict what displacements are in store for the next decade or two.

The capabilities of the microcomputer system, which can be purchased for the price of an automobile, is comparable to that of a medium scale computer of a decade

« iepriekšējāTurpināt »