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INTRODUCTION

NEUROCOMPUTING AT

MITSUBISHI ELECTRIC

This article profiles Mitsubishi Electric and describes the work in its Neurocomputing and Optoelectronics Group in Osaka.

Western scientists, especially those in universities, often have only vague ideas about the real size of some Japanese high tech companies. A good example is Mitsubishi. While probably best known in the West for its automobiles and shipbuilding activities, I wonder how many realize that Mitsubishi Electric (MELCO), which does not include either of the automotive or ship construction companies, is itself a $27B company at today's exchange rate, with just under 100,000 employees, and celebrated its 70th anniversary in 1991? See my report, "Flexible Automation," Scientific Information Bulletin 16(1), 27-35 (1991), for a description of some of Mitsubishi's shipbuilding activities. For a more general overview see "Mitsubishi Electric Corporation: Its Basic Research Focus," Scientific Information Bulletin 16(4), 39-42 (1991). Note that in January 1992 the Yamato I, a 280-ton prototype superconducting propulsion system ship, was launched by Mitsubishi Heavy Industries (separate company from MELCO), and that MELCO and other parts of the Mitsubishi family will participate on a bid for the 409-km/100-minute SeoulPusan, Korea, bullet train project (total cost is estimated near $10B), to be completed before the end of the century. MELCO products fall into four areas.

• Consumer products (audio-visual, home electronics, and appliances)

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Computer and Information Systems Laboratory (Kamakura)--R&D of computer- and information-related systems and equipment.

• Communication Systems Laboratory (Kamakura)--Overall R&D of communication systems technologies and devices.

• Electro-Optics and Microwave Systems Laboratory (Kamakura)-Development of new technologies for components in fields such as electro-optics and and microwave systems.

⚫ LSI Laboratory (Osaka)--R&D of design and production technologies for integrated circuits (ICs), large scale integration (LSI), very large scale integration (VLSI), and discrete semiconductors as well as the creation of new products.

• Optoelectronic and Microwave

Devices Laboratory (Osaka)--R&D of design and production technologies for optoelectronic and microwave devices and the creation of new products.

• ASIC Design Engineering Center (Osaka)--Development of custom LSI design technologies and support for the design of LSIS for use in in-company systems.

MELCO is heavily into advanced transportation, such as superconducting trains (mag-lev) and superconducting ship propulsion systems, and it supplies vast numbers of locomotives and related rail-stock to countries from China to Mexico.

MELCO is active in the Institute for New Generation Computer Technology (ICOT) program with the development of several versions of PSI, a parallel sequential inference machine, including the first one ready in Japan. One application is for a JapaneseEnglish translation system. There are a number of other parallel processing projects including a high speed database machine and a parallel-syntax processor for man-machine speech recognition system. The company has produced more than 150,000 elevators and escalators, including a group that uses artificial intelligence (AI), expert systems, and fuzzy theory, and it has recently produced the world's first spiral escalator (installed in San Francisco). Similarly, it has a fuzzy controller for electric discharge machines, an expert system for insulation diagnosis, and a developing knowledge media station.

MELCO has the largest value added network in Japan (packet-switching) and is planning to use this to link 20,000 terminals in its corporate E-mail net, both Unix workstations in technical divisions and PCs in administrative divisions. A server will be installed in a local area network (LAN) used by

• MELCO Research Laboratory each laboratory and a main server will U.S.A. (Boston)

MELCO is currently constructing a synchrotron-radiation facility. It has an active superconductivity program and is working on 64-Mbit DRAMs, a GaAs semiconductor laser and field effect transistor (FET), an optical neurochip, a process using ultrafine ice particles as a cleaning agent in electronic device manufacture, semiconductor ceramic fiber (30-50 microns), and a very high integration digital signal processor.

be installed in the company's main office. When completed this year, it will connect 63 offices and 45 sales companies, hopefully reducing paperwork into the main office from its current 3 tons each day.

The company is also developing a number of products that will depend on using the ISDN (Integrated Services Digital Network) now being installed in Japan. For example, one home automation system monitors a home for gas leaks, fire, unlocked doors,

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a total of 18 staff. Of these, five have Ph.D. degrees and three more have some prospect of obtaining this degree in the future. Typically, Japanese companies hire recent graduates with the equivalent of a bachelor's or master's degree. In the case of Kyuma's group, staff members have backgrounds in physics, applied physics, mathematics, materials, etc. There is very little recruitment of university trained Ph.D. holders. On the other hand, scientists working at an industrial laboratory have the opportunity to obtain a Ph.D. after a number of years and an appropriate amount of published research. In the United States it is also possible to obtain a Ph.D. while working, i.e., off campus, but these (U.S.) students are usually well known to their faculty advisor and there is a great deal of interaction between student and university. In Japan, the student-university connection is much weaker.

I've often wondered how it is possible for Japanese companies to produce so much interesting science with this kind of a system. One part of the reason is that good companies are extremely selective and only hire a few students each year--hopefully the very best. These then stay with their group for a long time, gaining experience, attending meetings, etc. Promising staff are often sent outside the company for training or additional education (see below). The group and project leaders are more senior and these people usually have advanced degrees, although often obtained via industrial publications as mentioned above. (Sometimes industrial scientists leave their company for academic positions.) The good Japanese research laboratories are also sprinkled with Western visitors. To be perfectly honest, the equation still does not compute for me, but the results speak for themselves.

Our original plan was to learn about MELCO's work in both neural nets and software development. However,

the latter did not work out and my visit was restricted to optical computing and neural nets.

The most exciting project here has been the development of a fully optical neural chip, with eight neurons and (optically) adjustable weights. Dr. Kyuma has been the key person on this project, although I was shown the device by Mr. Jun Ohta (tel: +81-6-497-7049, E-mail: ohta@qua.crl.melco.co.jp). (Ohta is a good example of how a company like MELCO increases staff skills. Next fall, Ohta will move to Boulder, Colorado, to join Professor Thomas Cathey's optoelectronics group as a postdoctoral student.) The Mitsubishi chip is the most advanced to my knowledge. It was developed using molecular beam epitaxy (MBE) crystal growth technology and GaAs optoelectronic device technology. The first prototype, about a 1-foot cube, was developed in 1988. The current chip is mounted on a board together with other LSI devices and is in use in a demonstration neural computer hooked to a small workstation. The chip consists of three stacked layers: a light emitting diode (LED) array, in interconnection matrix, and a photodiode (PD) array. Both LED and PD arrays are placed in a crossbar with a dynamic spatial light modulator sandwiched between them as the interconnection weight matrix. The original neural network used spatial light modulators. The new neurochip uses variable sensitivity of its photodiodes, controlled externally, to adjust the weights. This allows vector matrix multiplication to be done in parallel, and because the weight matrix can be adjusted, it also means that the chip can learn. This is quite distinct from other approaches in which the interconnection weights are fixed in hardware and use Hopfield models without learning ability. The current chip is an 8x8. Ohta claims that their construction approach allows for about 2,000 neurons/cm2.

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In this approach, the quantized weights are built on the optical hardware and the continuous weights are stored in memory, allowing continuous changes in the weights and parallel optical implementation at the same time. Mitsubishi staff have shown that learning can be successful even if synaptic weights are quantized into only two levels. They have not only many simulation results but also implementation experiments using binary operating semiconductor light modulators (SLMs) to recognize the 26 alphabetic characters (Ref 1 and 2).

Several of the group members commented that they appreciated the opportunity to spend time talking to me and also listening over my shoulder while their colleagues described their

own research work. In fact, they felt that such interactions were very uncommon. This was extremely surprising to me, as is typically Japanese, the group works in a large airy room with modest partitions between desks, and I expected that very free interchange would be the rule rather than the exception. I was told that there is plenty of joint work but very little free time for researchers who are not working directly together on a project to sit around and talk about their work informally. An internal seminar was started last year but hasn't succeeded too well. Work hours are for working. Lunch is normally at one's desk, and seminars are after 1700; there is a commons room, but it is apparently rarely used. I remarked that I didn't find it troublesome to have seminars late in the day and that to a large extent lack of time to talk to colleagues was self-imposed. While there was general agreement, the scientists also felt that seminar times were symbolic, and the atmosphere discouraged the kind of cross-group interaction that is typical at Western research laboratories or at universities.

The neural net group is mostly doing algorithm development and simulation of different learning models. Some of this is clearly motivated by the parallel work on the optical neural chip described above (Ref 3). The focus of this work has been to try and solve the performance degradation problem that is usually associated with weight quantization. (Performance here is expressed by the number of steps necessary for successful training.)

on workstations, sometimes used as a cluster. Given the large amount of simulation and the sophistication of the models, I am surprised that they don't have access to a parallel machine, such as a CM-2. The Industrial Electronics and Systems Laboratory does have an NCube, but the neural net group does not make use of it.

Another problem with some connection to optical computation was shown to me by Lange. He has been studying the issue of identifying the face value of a postage stamp from its image. The interesting wrinkle here is that the stamp image is not digitized. Rather, a small number (32) of sensors directly read intensity and frequency from parts of the stamp, and it is their values that are input to a neural net, REFERENCES whose ultimate output is the stamp's face value. The stamp recognition project has succeeded (at least partially) in optical implementation. The neural network (competitive) has been implemented. Only the sensor device has not (so far). There is an internal report on this project, which is going to be published as part of a book (Ref 4).

Other work has been directed toward studying time varying spatial patterns, and Banzhaf has developed a network capable of removing distortions of patterns in time (Ref 5).

There is also work on genetic, evolutionary, or molecular algorithms applied, for example, to the traveling salesman problem (TSP), where the shortest tour in a given distribution of cities is looked for which visits all cities once and returns to the starting point. This problem is "classical," but it is a prototype of many nonpolynomial (NP) complete (i.e., problems that cannot be solved in time, which is a polynomial in the number of cities).

The group has access to MELCO's Cray Y-MP, which is in the Materials and Electronic Devices Laboratory, but most of their simulation work is done

1. J. Ohta, Y. Nitta, and K. Kyuma, "Dynamic optical neurochip using variable-sensitivity photodiodes," Optics Letters 16(10), 744-46 (May 1991).

2. M. Takahashi, M. Oita, S. Tai, K. Kojima, and K. Kyuma, “A quantized back propagation learning rule and its application to optical neural networks," Optical Computing and Processing 1(2), 175-82 (1991).

3. W. Banzhaf, M. Takahashi, J. Ohta, and K. Kyuma, “Weight quantization in Boltzmann machines," Neural Networks 4, 405-9 (1991).

4. W. Banzhaf, E. Lange, M. Oita, J. Ohta, K. Kyuma, and T. Nakayama, "Optical implementation of a competitive network," MELCO Internal Report, to be published in Fast Intelligent Systems, B. Soucek, editor (Wiley Series in Sixth Generation Computing Technologies).

5. W. Banzhaf and K. Kyuma, "The time-into-intensity-mapping network," Biological Cybernetics 66, 115-21 (1991).

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