The Student's Guide to VHDLElsevier Science, 1998. gada 1. janv. - 336 lappuses VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured. This new book provides a tutorialintroduction to the fundamental modeling features of VHDL and shows how the features are used for the design of digital systems. Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL. |
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1.3. rezultāts no 17.
... width - 1 ) ; q : out bit_vector ( 0 to width - 1 ) ; end entity reg ; . ) ; In this declaration we require that the user of the register specify the desired port width for each instance . The entity then uses the width value as a ...
... width 1 ) ; q : out_bit_vector ( 0 to width 1 ) ; clk , reset : in bit ) ; end entity reg ; architecture behavioral of reg is begin behavior : process ( clk , reset ) is - constant zero : bit_vector ( 0 to width 1 ) : = ( others ...
... width 1 ) ; data_out : out std_logic_vector ( 0 to width 1 ) ) ; end entity reg ; An entity declaration for a register , including generic constants for timing and port width . architecture structural of controller is component reg ...
Saturs
Fundamental Concepts | 1 |
X | 22 |
A Scalar Data Types and Operations | 27 |
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Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication Hubert Kaeslin Ierobežota priekšskatīšana - 2008 |