The Student's Guide to VHDL
Elsevier Science, 1998. gada 15. janv. - 336 lappuses
VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured.
Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL.
1.3. rezultāts no 89.
Constants and Variables An object is a named item in a VHDL model that has a
value of a specified type . ... The difference between them is that the value of a
constant cannot be changed after it is created , whereas a variable ' s value can
variable index : integer : = 0 ; variable sum , average , largest : real ; variable start
, finish : time : = 0 ns ; If we include more than one identifier in a variable
declaration , it is the same as having separate declarations for each identifier .
The third and fourth actual parameters are the names of variables . ... Since this
class is assumed for out parameters , we usually leave out the class specification
variable , although it may be included if we wish to state the class explicitly .
Lietotāju komentāri - Rakstīt atsauksmi
11 citas sadaļas nav parādītas.
Citi izdevumi - Skatīt visu
Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication
Ierobežota priekšskatīšana - 2008