The Student's Guide to VHDL
Elsevier Science, 1998. gada 15. janv. - 336 lappuses
VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured.
Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL.
1.3. rezultāts no 24.
FIGURE 8 - 1 function resolve _ tri _ state _ logic ( values : in tri _ state _ logic _
array ) return tri _ state _ logic is variable result : tri _ state _ logic : = ' Z ' ; begin
for index in values ' range loop if values ( index ) ! = ' Z ' then result : = values ...
The output ports of the two instances of the buffer form two sources for the
resolved signal selected _ val . Composite Resolved Subtypes The above
examples have all shown resolved subtypes of scalar enumeration types . In fact ,
VHDL ' s ...
The final value driven by the resolved port is determined by resolving all of the
sources within the architecture body . For example , we might declare an entity
with a resolved port as follows : library ieee ; use ieee . std _ logic _ 1164 . all ;
Lietotāju komentāri - Rakstīt atsauksmi
11 citas sadaļas nav parādītas.
Citi izdevumi - Skatīt visu
Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication
Ierobežota priekšskatīšana - 2008