The Student's Guide to VHDLElsevier Science, 1998. gada 1. janv. - 336 lappuses VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured. This new book provides a tutorialintroduction to the fundamental modeling features of VHDL and shows how the features are used for the design of digital systems. Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL. |
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1.3. rezultāts no 26.
... formal model is an in- valuable tool for documenting a system . A third motivation for modeling is to allow testing ... formal verification of the correctness of a design . Formal verification requires a mathematical statement of the ...
... formal parameters a and b . The third and fourth actual parameters are the names of variables . When the procedure re- turns , the values assigned by the procedure to the formal parameters result and overflow are used to update the ...
... formal generics Tpd_01 and Tpd_10 and for the formal ports so , s1 , yo , y1 , y2 and y3 in Figure 10-15 . Every local generic and port of the component instance must be associated with a formal generic or port , respectively ...
Saturs
Fundamental Concepts | 1 |
X | 22 |
A Scalar Data Types and Operations | 27 |
Autortiesības | |
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Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication Hubert Kaeslin Ierobežota priekšskatīšana - 2008 |