The Student's Guide to VHDLVHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured. Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL. |
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1.3. rezultāts no 71.
3.2 Case Statements If we have a model in which the behavior is to depend on the value of a single expression , we can use a case statement . The syntax rules are as follows : case_statement ( case_label :) case expression is ( when ...
statement , on the other hand , evaluates a single selector expression to derive a selector value . ... a more general mechanism for selecting between alternatives , since the conditions can be arbitrarily complex Boolean expressions .
actual_part = expression | signal_name variable_name open | function_name ( ( signal_name s variable_name ) ) type_mark ( ( signal_name variable_name ) ) C.8 Expressions expression = relation { and relation } relation ( nand relation ] ...
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Scalar Data Types and Operations | 27 |
Sequential Statements | 53 |
Exercises | 78 |
Autortiesības | |
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Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication Hubert Kaeslin Ierobežota priekšskatīšana - 2008 |