The Student's Guide to VHDL
Elsevier Science, 1998. gada 15. janv. - 336 lappuses
VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured.
Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL.
1.3. rezultāts no 43.
The process ' s variables ( listed after the keyword variable ) are initialized to ' O ' ,
then the statements are executed in order . The first statement is a condition that
tests whether the values of the en and clk signals are both ' 1 ' . If they are , the ...
A simple example of an if statement is if en = ' 1 ' then stored _ value : = data _ in ;
end it ; The expression after the keyword it is the condition that is used to control
whether or not the statement after the keyword then is executed . If the condition ...
In this example , the first condition is evaluated , and if true , the statement after
the first then keyword is executed . If the first condition is false , the second
condition is evaluated , and if it evaluates to true , the statement after the second
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