The Student's Guide to VHDLElsevier Science, 1998. gada 15. janv. - 312 lappuses VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured. Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL.
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... called samples and assigns the result to a variable called average . This procedure has a local variable total for accumulat- ing the sum of array elements . Unlike variables in processes , procedure local vari- ables are created anew ...
... called from each place . EXAMPLE Figure 6-3 shows an outline of a process taken from a behavioral model of a CPU ... called in two places within the process . First , it is called to fetch an instruction . The process copies the program ...
... called its context clause . In fact , this is probably the most common place for including use clauses . The names ... called standard , located in a special design library called std . A full listing of the standard package is included ...
Saturs
Fundamental Concepts | 1 |
X | 22 |
A Scalar Data Types and Operations | 27 |
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Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication Hubert Kaeslin Ierobežota priekšskatīšana - 2008 |