The Massively Parallel Processing System JUMP-1Hidehiko Tanaka, Yōichi Muraoka Ohmsha, 1996 - 235 lappuses The work features the development of the fundamental technologies for massively parallel processing, covering research on the applications, the language, the operating system and the hardware architecture. Also the present status and future plans are addressed. The following topics are discussed in the section on applications: the MGCG Method; Parallelization of FEM; Modeling of Group Behaviors; Parallel Visualization; Functional Memory Type Parallel Processing; a Parallel Reduction Algorithm and Combination Algorithm. As for the programming languages, the SIMD-Based Language NCX, the Dataflow-based Language V and the Parallel Object-Oriented Language A-NETL are discussed. In the chapter on operating systems, the subjects Design Philosophy and Objectives; COS Software Architecture and Elements of the Operating System are - amongst others - addressed. Finally, the part on hardware architecture covers an Overview of the JUMP-1 System; Memory Architecture; Network Architecture; I/O Architecture and Implementation Issues. Massively parallel processing is expected to play a crucial role in the development of almost all advanced technologies for the 21st century. This book is intended to serve a large variety of researchers in the area of parallel computing. |
No grāmatas satura
1.–3. rezultāts no 25.
69. lappuse
... unit of synchronous op- eration will shift up towards the level of the instruction sequence from the level of the individual instruction in the SIMD model . So , data transfers and commu- nications will occur not in the instruction ...
... unit of synchronous op- eration will shift up towards the level of the instruction sequence from the level of the individual instruction in the SIMD model . So , data transfers and commu- nications will occur not in the instruction ...
189. lappuse
... Unit pe_reg buffer full bus_buf rmsg_tbl net_buf ( send , recv ) memory bank PSO manager trans . counter C - TLB DMA unit home_serializer cm_controller blk_buf- Icache JTC MBP - Core EB 83 EB controller ack_combinator C - TLB multi ...
... Unit pe_reg buffer full bus_buf rmsg_tbl net_buf ( send , recv ) memory bank PSO manager trans . counter C - TLB DMA unit home_serializer cm_controller blk_buf- Icache JTC MBP - Core EB 83 EB controller ack_combinator C - TLB multi ...
214. lappuse
... unit . For disk I / O units , we are using UNIX workstations . The disk I / O unit con- ducts access control to the disk through a SCSI - 2 interface , in response to disk blocks that are transferred from cluster device drivers or track ...
... unit . For disk I / O units , we are using UNIX workstations . The disk I / O unit con- ducts access control to the disk through a SCSI - 2 interface , in response to disk blocks that are transferred from cluster device drivers or track ...
Citi izdevumi - Skatīt visu
The Massively Parallel Processing System JUMP-1 Hidehiko Tanaka,Yōichi Muraoka Priekšskatījums nav pieejams - 1996 |
Bieži izmantoti vārdi un frāzes
A-NETL address space algorithm allocated architecture array basic block buffer calculated cluster convergence data structures data-parallel Dirichlet boundary condition disk distributed shared memory double-word efficient equation example execution expression Fibonacci tree Fibonet field FIFO fine-grained FMPP function grid hardware highly parallel implementation inner points input interface iteration L2 cache language latency mapping massively parallel computer massively parallel processing memory access memory objects mesh MFlops MGCG method Micro Kernel MIMD mono multigrid method multiple Neumann boundary condition nodes number of processors operating system overhead parallel machines parallel stream partition performance problem Proc processing elements protocol prototype PUX server queue ray tracing reduction computation shown in Figure SIMD simulation speedup STAFF-Link substructure method synchronization T-algorithm Table task topology torus toruses TraceRay update variable vector virtual processors voxel