Network Processor Design: Issues and PracticesMark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk Elsevier, 2005. gada 11. marts - 336 lappuses The past few years have seen significant change in the landscape of high-end network processing. In response to the formidable challenges facing this emerging field, the editors of this series set out to survey the latest research and practices in the design, programming, and use of network processors. Through chapters on hardware, software, performance and modeling, Network Processor Design illustrates the potential for new NP applications, helping to lay a theoretical foundation for the architecture, evaluation, and programming of networking processors. Like Volume 2 of the series, Volume 3 further shifts the focus from achieving higher levels of packet processing performance to addressing other critical factors such as ease of programming, application developments, power, and performance prediction. In addition, Volume 3 emphasizes forward-looking, leading-edge research in the areas of architecture, tools and techniques, and applications such as high-speed intrusion detection and prevention system design, and the implementation of new interconnect standards.
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No grāmatas satura
1.–5. rezultāts no 45.
... Multithreaded Processors with Segmented Instruction Caches 2.1 Patrick Crowley Instruction Delivery in NP Data Processors 11 2.1.1 Fixed-Size Control Store 11 2.1.2 Using a Cache as a Fixed-Size Control Store 12 Segmented Instruction ...
... Multithreaded TCP Offload Engine for 10 Gb/s Ethernet 5.1 5.2 Yatin Hoskote, Sriram Vangal, Vasantha Erraguntla ... Multithreading and Scheduling Logic 92 Performance Analysis 95 5.3 5.4 Conclusions 97 Acknowledgments 98 References 98 81 ...
... multithreaded processors are proposed. Such a cache is shared by real-time and nonreal-time threads with real-time threads being mapped and preloaded into segments large enough to avoid misses, while nonreal-time threads being mapped to ...
... multithreaded code that performs filtering, IP defragmentation, and TCP reassembly. In parallel, computationally-intensive pattern matching is performed by the FPGA. Faster line rates and increased use of TCP have renewed interest in ...
... multi- threaded processing block, a scheduler for thread control, a large segmented transmission control block to ... multithreaded packet-processing engine, such as that found in a network processor. The authors indicate that such an ...
Saturs
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9 | |
33 | |
Chapter 4 Towards a Flexible Network Processor Interface for RapidIO Hypertransport and PCIExpress | 55 |
Chapter 5 A HighSpeed Multithreaded TCP Offload Engine for 10 Gbs Ethernet | 81 |
Chapter 6 A Hardware Platform for Network Intrusion Detection and Prevention | 99 |
Chapter 7 Packet Processing on a SIMD Stream Processor | 119 |
Design Considerations | 145 |
Chapter 9 RNOSA Middleware Platform for LowCost PacketProcessing Devices | 173 |
Chapter 10 On the Feasibility of Using Network Processors for DNA Queries | 197 |
Chapter 11 Pipeline Task Scheduling on Network Processors | 219 |
Chapter 12 A Framework for Design Space Exploration of Resource Efficient Network Processing on Multiprocessor SoCs | 245 |
Chapter 13 Application Analysis and Resource Mapping for Heterogeneous Network Processor Architectures | 279 |
Index | 309 |
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Network Processor Design: Issues and Practices, 3. sējums Mark A. Franklin,Patrick Crowley,Haldun Hadimioglu Priekšskatījums nav pieejams - 2005 |