Network Processor Design: Issues and PracticesMark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk Elsevier, 2005. gada 11. marts - 336 lappuses The past few years have seen significant change in the landscape of high-end network processing. In response to the formidable challenges facing this emerging field, the editors of this series set out to survey the latest research and practices in the design, programming, and use of network processors. Through chapters on hardware, software, performance and modeling, Network Processor Design illustrates the potential for new NP applications, helping to lay a theoretical foundation for the architecture, evaluation, and programming of networking processors. Like Volume 2 of the series, Volume 3 further shifts the focus from achieving higher levels of packet processing performance to addressing other critical factors such as ease of programming, application developments, power, and performance prediction. In addition, Volume 3 emphasizes forward-looking, leading-edge research in the areas of architecture, tools and techniques, and applications such as high-speed intrusion detection and prevention system design, and the implementation of new interconnect standards.
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1.5. rezultāts no 22.
... rates at low power consumption. The main components of the device are a high-speed, multithreaded processing block ... Miss rate improves with increasing segment sizes. ✦ Miss. 1 2 3 4 5 6 7 8 9 2b 2a 3 1 IXP1200 SRAM CTAAGGT ATGCAA ...
... miss rates with profile-driven code scheduling and setassociativity. Section 2.4 presents related work; the paper ends with conclusions and future work in Section 2.5. INSTRUCTION DELIVERY IN NP DATA PROCESSORS Network processors, like ...
... misses are serviced) is likely to be a resource shared by real-time activities (e.g. ... rate can be set by the system and thereby bounded for the purpose of system ... miss-reduction techniques. Benchmark. Programs. and. Methodology. Our ...
... miss rates for the locality segment-sizing strategy, both before and after preloading, and categorizes the misses for the preloaded miss rate. There are several points to be made: ✦ Miss rates (even with preloading) are quite high ...
... Miss rate With Preloading Miss rate Compulsory Capacity Conflict binsearch 20 0.98 0.89 0.40 0.60 0.00 40 0.84 0.66 0.41 0.59 0.00 60 0.50 0.23 0.78 0.00 0.23 80 0.45 0.09 1.00 0.00 0.00 chk_data 20 0.94 0.89 0.20 0.80 0.00 40 0.42 0.33 ...
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Chapter 4 Towards a Flexible Network Processor Interface for RapidIO Hypertransport and PCIExpress | 55 |
Chapter 5 A HighSpeed Multithreaded TCP Offload Engine for 10 Gbs Ethernet | 81 |
Chapter 6 A Hardware Platform for Network Intrusion Detection and Prevention | 99 |
Chapter 7 Packet Processing on a SIMD Stream Processor | 119 |
Design Considerations | 145 |
Chapter 9 RNOSA Middleware Platform for LowCost PacketProcessing Devices | 173 |
Chapter 10 On the Feasibility of Using Network Processors for DNA Queries | 197 |
Chapter 11 Pipeline Task Scheduling on Network Processors | 219 |
Chapter 12 A Framework for Design Space Exploration of Resource Efficient Network Processing on Multiprocessor SoCs | 245 |
Chapter 13 Application Analysis and Resource Mapping for Heterogeneous Network Processor Architectures | 279 |
Index | 309 |
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Network Processor Design: Issues and Practices, 3. sējums Mark A. Franklin,Patrick Crowley,Haldun Hadimioglu Priekšskatījums nav pieejams - 2005 |