Network Processor Design: Issues and PracticesMark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk Elsevier, 2005. gada 11. marts - 336 lappuses The past few years have seen significant change in the landscape of high-end network processing. In response to the formidable challenges facing this emerging field, the editors of this series set out to survey the latest research and practices in the design, programming, and use of network processors. Through chapters on hardware, software, performance and modeling, Network Processor Design illustrates the potential for new NP applications, helping to lay a theoretical foundation for the architecture, evaluation, and programming of networking processors. Like Volume 2 of the series, Volume 3 further shifts the focus from achieving higher levels of packet processing performance to addressing other critical factors such as ease of programming, application developments, power, and performance prediction. In addition, Volume 3 emphasizes forward-looking, leading-edge research in the areas of architecture, tools and techniques, and applications such as high-speed intrusion detection and prevention system design, and the implementation of new interconnect standards.
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1.–5. rezultāts no 45.
... (Intel). The workshop program also included a keynote address by Nick McKeown of Stanford University, an invited talk by Marco Heddes of Transwitch Corporation, and an industry panel session moderated by Mark Franklin. The panelists were ...
... Intel [5]. While economic conditions have slowed the introduction of commercial network processing architectures and ideas, academic researchers have continued to develop new techniques and approaches. As the deployment of network ...
... Intel Corporation , Intel IXP 2800 Network Processor , www.intel.com/design/network/products/npfamily/ixp2800.htm . 2 CHAPTER Supporting Mixed Real-Time Workloads in Multithreaded Processors with 1 Network Processors : New Horizons.
... Intel IXP [1] network processor family, consist of two types of on-chip programmable microprocessors: a control processor, which is a standard embedded microprocessor (the ARM-based XScale), and multiple data processors, which are ...
... Intel IXP the source code for all the programs in all the threads to be run on a data processor is compiled together to form a single binary instruction image, which is loaded by the control processor into the data processor's control ...
Saturs
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9 | |
33 | |
Chapter 4 Towards a Flexible Network Processor Interface for RapidIO Hypertransport and PCIExpress | 55 |
Chapter 5 A HighSpeed Multithreaded TCP Offload Engine for 10 Gbs Ethernet | 81 |
Chapter 6 A Hardware Platform for Network Intrusion Detection and Prevention | 99 |
Chapter 7 Packet Processing on a SIMD Stream Processor | 119 |
Design Considerations | 145 |
Chapter 9 RNOSA Middleware Platform for LowCost PacketProcessing Devices | 173 |
Chapter 10 On the Feasibility of Using Network Processors for DNA Queries | 197 |
Chapter 11 Pipeline Task Scheduling on Network Processors | 219 |
Chapter 12 A Framework for Design Space Exploration of Resource Efficient Network Processing on Multiprocessor SoCs | 245 |
Chapter 13 Application Analysis and Resource Mapping for Heterogeneous Network Processor Architectures | 279 |
Index | 309 |
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Network Processor Design: Issues and Practices, 3. sējums Mark A. Franklin,Patrick Crowley,Haldun Hadimioglu Priekšskatījums nav pieejams - 2005 |