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" Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. "
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... - 106. lappuse
autors: David Chinnery, Kurt Keutzer - 2008 - 388 lapas
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Low Power Design in Deep Submicron Electronics

W. Nebel, Jean Mermet - 1997 - 604 lapas
...Vol. 12, No. 2, Febr. 1993 40. Najm, F.: Low-Pass Filter for Computing Transition Density in Digital Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 13, No. 9, Sept. 1994 41. Najm, FN; Goel, S.; Hajj, I.: Power Estimation in Sequential Circuits. ACM/IEEE...
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Top-Down Design of High-Performance Sigma-Delta Modulators

Fernando Medeiro, Belén Pérez-Verdú, Angel Rodríguez-Vázquez - 1998 - 314 lapas
...Vol. 28, pp. 730-735, July 1993. [Opal96] A. Opal: "Sampled Data Simulation of Linear and Nonlinear Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, pp. 295-306, March 1996. [Op'T93] F. Op'T Eynde and W. Sansen: Analog Interfaces for Digital Signal...
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Thermal Testing of Integrated Circuits

Josep Altet, Antonio Rubio - 2002 - 226 lapas
...X.; Kinoshita, K., “An approach to the analysis and detection of crosstalk faults in digital VLSI circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, no. 3, March 1994, pp. 387-395. [26] Milne, A.; Taylor, D.; Saunders, J.; Talbot, AD, “Generation...
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Multi-Threshold CMOS Digital Circuits: Managing Leakage Power

Mohab Anis, Mohamed I. Elmasry - 2003 - 248 lapas
...June 1982. [10] M. Johnson, D. Somasekhar, and K. Roy, "Models and Algorithms for Bounds on Leakage in CMOS Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 6, pp. 714-725, 1995. [11] M. Chen and J. Ho, "A Three-Parameter-Only MOSFET Subthreshold Current...
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High-Frequency Oscillator Design for Integrated Transceivers

Johan van der Tang, Dieter Kasperkovitz, Arthur H. M. van Roermund - 2003 - 354 lapas
...Norwell, 1994. [65] G. van der Plas et al., "AMGIE— A Synthesis Environment for CMOS Analog Integrated Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 20, no. 9, pp. 1037-1058, Sept. 2001. [66] M. Ismail and J. Franca, Eds., Introduction to Analog VLSI...
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CMOS Telecom Data Converters

Angel Rodríguez-Vázquez, Fernando Medeiro, Edmond Janssens - 2004 - 644 lapas
...Petar Veselinovic, and Domine Leenaerts, "AMGIE - A Synthesis Environment for CMOS Analog Integrated Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 20, no. 9, pp. 1037-1058, September 2001. tern Search," IEEE Transactions on Computer-Aided Design...
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Digital System Clocking: High-Performance and Low-Power Aspects

Vojin G. Oklobdzija, Vladimir M. Stojanovic, Dejan M. Markovic, Nikola M. Nedovic - 2005 - 264 lapas
...KA, Mudge, TN, and Olukotun, OA (1992). "Analysis and Design of Latch-Controlled Synchronous Digital Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, p. 322-33. Schutz, J., and Wallace, R. (1998). "A 450MHz IA32 P6 Family Microprocessor," ISSCC...
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Low-Power Electronics Design

Christian Piguet - 2018 - 912 lapas
...for Wireless Communications, Proc. ISSCC, February 1997, pp. 92-93. [11] Wang, Q. and Vrudhula, SBK, Algorithms for minimizing standby power in deep submicrometer, dual-Vt CMOS circuits, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Syst., vol. 21, no. 3, March 2002, pp. 306-318....
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Leakage in Nanometer CMOS Technologies

Siva G. Narendra, Anantha P. Chandrakasan - 2006 - 308 lapas
...2002. [13] M. Anis, S. Areibi, and M. Elmasry, Design and optimization of multithreshold CMOS (MTCMOS) circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 22, No. 10, pp. 1324 -1342, October 2003. [14] F. Hamzaoglu and M. Stan, Circuit-level techniques to...
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Computational Intelligence and Security: International Conference ..., 2. daļa

Yue Hao - 2005 - 1205 lapas
...(1998)432-440 10. Papadopoulou, E.: Critical area computation for missing material defects in VLSI circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 20(2001)583-597 11. De Vries, OK, Simon, PLC : Calibration of open interconnect yield models. 18th...
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