Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low Power DesignSpringer Science & Business Media, 2008. gada 23. janv. - 388 lappuses This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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No grāmatas satura
1.–5. rezultāts no 93.
... transistor-level. ASIC designers generally focus on high level designs choices, at the microarchitectural level for example. With this broader context, let us pause to note that the use of the term ASIC can be misleading: it most often ...
... transistor-level to provide implementations that are optimal for that specific design; whereas an ASIC designer is limited by what is available in the standard cell library. 1.2 WHAT IS A STANDARD CELL ASIC METHODOLOGY? A standard cell ...
... transistor-level circuit design issues are abstracted to gate-level power and delay characteristics, and standard cells are designed robustly with guard-banding to ensure correct behavior. A library typically has several drive strengths ...
... transistor NMOS transistor B D S NOR2 NOR2 NAND2 NAND2 inverter inverter Figure 1.3 On the left is shown a detailed circuit schematic for an inverter. Transistor gate G, source S, drain D and bulk B (also referred to as substrate) nodes ...
... transistors in series, the slower the logic gate is due to increased series resistance. PMOS transistors are slower than NMOS transistors, so the NOR2 is slower than a NAND2, assuming the same transistor sizes. Wider transistors may be ...
Saturs
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11 | |
Methodology to Optimize Energy of Computation for SOCs | 107 |
Linear Programming for MultiVth and MultiVdd Assignment | 151 |
Power Gating Design Automation | 251 |
Barry Pangrle Srikanth Jadcherla | 281 |
Winning the Power Struggle in an Uncertain | 299 |
DESIGN EXAMPLES | 323 |
Low Power ARM 1136JFS Design | 357 |
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Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2008 |
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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