Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low Power DesignSpringer Science & Business Media, 2008. gada 23. janv. - 388 lappuses This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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No grāmatas satura
1.–5. rezultāts no 88.
... delay, power, or area constraints specified by the designer. The final layout of the chip is not known at the synthesis stage, so the wire capacitances are estimated using a wire load model. Then the standard cells are placed, wires are ...
... delay. A typical inverter PMOS to NMOS ratio to have equal pull-up and pull-drive strengths is 2:1. To reduce the additional delay ... constraint for high performance circuits and limits performance for high end microprocessor chips in ...
... delay constraints in 0.13um technology, the leakage varied from 8% to 21% of the total power consumption in ... constraint of 1.2× the minimum delay, the best library choice had Vdd of 0.8V and Vth of 0.08V (see Table 7.7 with 0.8V input ...
... delay overheads for microarchitectural techniques must be considered. With ... constraint may be 2.0× higher power than circuitry using a high speed logic ... constraint, which has a large impact on the power gap. We assumed a tight ...
... delay by inserting registers between combinational logic. Glitches may not propagate through pipeline registers, but ... constraint, the pipelining delay overheads reduce the slack available to perform downsizing and voltage scaling. In ...
Saturs
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Methodology to Optimize Energy of Computation for SOCs | 107 |
Linear Programming for MultiVth and MultiVdd Assignment | 151 |
Power Gating Design Automation | 251 |
Barry Pangrle Srikanth Jadcherla | 281 |
Winning the Power Struggle in an Uncertain | 299 |
DESIGN EXAMPLES | 323 |
Low Power ARM 1136JFS Design | 357 |
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Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2008 |
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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