Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low Power DesignSpringer Science & Business Media, 2008. gada 23. janv. - 388 lappuses This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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No grāmatas satura
1.–5. rezultāts no 30.
... Clock tree synthesis Detailed wire routing Figure 1.1 A typical EDA flow from a high level hardware design language (HDL) description through to layout. Delay, area, power constraints Blockages (e.g. RAM), power grid Custom ICs are ...
... clock tree network is inserted to distribute the clock signal. The EDA flow may be iterated through many times as a design is changed to meet performance constraints. Small changes may be made at the layout level, but significant ...
... clock tree and registers, control and datapath logic, and memory. The breakdown of power consumption between these is very application and design dependent. The power consumption of the clock tree and registers ranged from 18% to 36% of ...
... clock tree. The design cost for custom memory is low, because of the high regularity. Several companies provide custom memory for ASIC processes. Optimization of memory hierarchy, memory size, caching policies, and so forth is ...
... clock skew [19]. The custom XScale used clock-pulsed transparent latches [22] ... tree and can be used in ASIC designs for pipeline balancing [26]. With these ... clock frequency. From our pipeline model, ASICs can close the gap for the ...
Saturs
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Methodology to Optimize Energy of Computation for SOCs | 107 |
Linear Programming for MultiVth and MultiVdd Assignment | 151 |
Power Gating Design Automation | 251 |
Barry Pangrle Srikanth Jadcherla | 281 |
Winning the Power Struggle in an Uncertain | 299 |
DESIGN EXAMPLES | 323 |
Low Power ARM 1136JFS Design | 357 |
Citi izdevumi - Skatīt visu
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2008 |
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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