Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low Power DesignSpringer Science & Business Media, 2008. gada 23. janv. - 388 lappuses This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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1.5. rezultāts no 32.
... PMOS transistor NMOS transistor B D S NOR2 NOR2 NAND2 NAND2 inverter inverter Figure 1.3 On the left is shown a detailed circuit schematic for an inverter. Transistor gate G, source S, drain D and bulk B (also referred to as substrate) ...
... PMOS transistors are slower than NMOS transistors, so the NOR2 is slower than a NAND2, assuming the same transistor sizes. Wider transistors may be used to reduce the delay. A typical inverter PMOS to NMOS ratio to have equal pull-up ...
... PMOS transistors is connected to the supply. The subthreshold leakage can be reduced by increasing the threshold ... PMOS sleep transistors at the expense of a 6% area overhead and 2.3% speed decrease [89]. The leakage was reduced 64× by ...
... PMOS transistors are roughly 2× slower than NMOS transistors of the same width, which is particularly a problem for NOR gates. With the two PMOS transistors in series in Figure 2.6(a), the PMOS transistors must be sized about 4× larger ...
... PMOS transistors in series A B + A A B + A B + B B A B (b) differential cascode voltage BA(a) complementary CMOS logic switch logic (DCVSL) clock (d) dynamic domino logic A B + 0 (c) pass transistor logic (PTL) A B + BA clockA B B ...
Saturs
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Methodology to Optimize Energy of Computation for SOCs | 107 |
Linear Programming for MultiVth and MultiVdd Assignment | 151 |
Power Gating Design Automation | 251 |
Barry Pangrle Srikanth Jadcherla | 281 |
Winning the Power Struggle in an Uncertain | 299 |
DESIGN EXAMPLES | 323 |
Low Power ARM 1136JFS Design | 357 |
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Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2008 |
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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