Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low Power DesignSpringer Science & Business Media, 2008. gada 23. janv. - 388 lappuses This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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No grāmatas satura
1.–5. rezultāts no 51.
... CMOS. A variety of factors cause synthesizable designs to consume 3 to 7× more power. We discuss the shortcomings of typical synthesis flows, and changes to tools and standard cell libraries needed to reduce power. Using these methods ...
... CMOS logic [77]. Short circuit power typically contributes less than 10% of the total dynamic power [14], and increases with increasing Vdd, and with decreasing Vth. Short circuit power can be reduced by matching input and output rise ...
... CMOS logic in bulk CMOS is primarily due to subthreshold leakage and gate leakage. Subthreshold leakage increases exponentially with decrease in Vth and increase in temperature. It can also be strongly dependent on transistor channel ...
... CMOS logic that is used in ASICs. Sense amplifiers were used with the low voltage swing dual rail bus to detect voltage swings of less than 200mV, achieving high bus speeds at lower power consumption [60]. The die area of the Halla was ...
... CMOS logic at a tight performance constraint may be 2.0× higher power than circuitry using a high speed logic style to provide timing slack for power reduction by voltage scaling and gate downsizing. Other factors in Table 2.4 have ...
Saturs
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Methodology to Optimize Energy of Computation for SOCs | 107 |
Linear Programming for MultiVth and MultiVdd Assignment | 151 |
Power Gating Design Automation | 251 |
Barry Pangrle Srikanth Jadcherla | 281 |
Winning the Power Struggle in an Uncertain | 299 |
DESIGN EXAMPLES | 323 |
Low Power ARM 1136JFS Design | 357 |
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Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2008 |
Closing the Power Gap between ASIC & Custom: Tools and Techniques for Low ... David Chinnery,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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