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" T.-Y. Yeh. DT Marr, and YN Patt. Increasing the instruction fetch rate via multiple branch prediction and a branch address cache. "
Digital Systems and Applications - 4-46. lappuse
laboja - 2017 - 992 lapas
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Readings in Computer Architecture

Mark D. Hill, Mark D.. Hill, Norman P. Jouppi, Norman P.. Jouppi, Gurindar S. Sohi - 2000 - 717 lapas
...allocation," IEEE Transactions on Electronic Computers, EC- 14(2): 270-271, 1965. [24] T.-Y. Yeh, D. Marr, and YN Patt, "Increasing the instruction fetch rate via multiple branch prediction and branch address cache," Proceedings of the 1993 ACM International Conference on Supercomputing, pp....
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The Computer Engineering Handbook

Vojin G. Oklobdzija - 2001 - 1408 lapas
...Int. Symp. on Computer Architecture, pp. 333-344, June 1995. 29. Yeh, T.-Y, Marr, DT, and Patt, YN, Increasing the instruction fetch rate via multiple branch prediction and a branch address cache, in Proc. 7th Int. Conf. on Supercomputing, pp. 67-76, July 1993. 30. Rotenberg, E., Bennett, S., and...
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Speculative Execution in High Performance Computer Architectures

David Kaeli, Pen-Chung Yew - 2005 - 456 lapas
...Architectural Support for Programming Languages and Operating Systems, pages 116-127, Oct 1996. [27] TY. Yeh, DT Marr, and YN Patt. Increasing the instruction...cache. 7th International Conference on Supercomputing, pages 67-76, July 1993. Chapter 5 Branch Predication David August Princeton University 5.1 Introduction...
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Speculative Execution in High Performance Computer Architectures

David Kaeli, Pen-Chung Yew - 2005 - 456 lapas
...Systems, pages 116-127, Oct 1996. [27] TY. Yeh, DT Marr, and YN Patt. Increasing the instruction fetcli rate via multiple branch prediction and a branch address cache. 7th International Conference on Super computing, pages 67-76, July 1993. Chapter 5 Branch Predication David August Princeton University...
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Architecture of Computing Systems - ARCS 2006: 19th International Conference ...

Werner Grass, Bernhard Sick - 2006 - 496 lapas
...through renaming. In Proc. of the 30th MICRO, Dec. 1997. 31. T.-Y. Yeh, D. Marr, and Y. Patt. Increasing instruction fetch rate via multiple branch prediction and a branch address cache,. In In Proc. of the 7th ACM Int. Conf. on Supercomputing, July 1993. Scalable and Partitionable Asynchronous...
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