CODES+ISSSACM Press, 2004 |
No grāmatas satura
1.–3. rezultāts no 52.
28. lappuse
... outputs are valid . It means that we need input ( or output ) buffers to store as many input ( or output ) samples as specified at each input ( output ) port . In Meyr's work [ 9 ] , a node consumes or produces one sample at each ...
... outputs are valid . It means that we need input ( or output ) buffers to store as many input ( or output ) samples as specified at each input ( output ) port . In Meyr's work [ 9 ] , a node consumes or produces one sample at each ...
52. lappuse
... output port rate - shaping EgrSeg : temporary buffer for output SPI segment EgrSPI : output SPI protocol DSOC Traffic Manager 8.3 StepNP Target Architrecture The application described above is mapped on the StepNP platform instance of ...
... output port rate - shaping EgrSeg : temporary buffer for output SPI segment EgrSPI : output SPI protocol DSOC Traffic Manager 8.3 StepNP Target Architrecture The application described above is mapped on the StepNP platform instance of ...
180. lappuse
... output 1 and if output 1 is free . If that fails , the same check will be made on output 2 , and so on . If all four outputs are tested and the packet is still not routed , the packet will be forced in the best direction available ...
... output 1 and if output 1 is free . If that fails , the same check will be made on output 2 , and so on . If all four outputs are tested and the packet is still not routed , the packet will be forced in the best direction available ...
Saturs
Keynote | 1 |
DualPipeline Heterogeneous ASIP Design | 12 |
Fast CycleAccurate Simulation and Instruction Set Generation | 18 |
Autortiesības | |
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