 a novel semiconductor device with a subthreshold slope lower than kT/q, IEDM Tech. Dig., pp. 289—292, 2002. [8] T. Kuroda et al. “Variable threshold-voltage CMOS technology, IEICE Trans. Electron., Vol. E83-C, No. 11, November 2000. [9] A. Keshavarzi...  Low-Power Electronics Design - 3-1. lappuselaboja - 2018 - 912 lapasIerobežota priekšskatīšana - Par šo grāmatu
 | Vojin G. Oklobdzija - 2001 - 1422 lapas
...Tech. Dig., p. 273, Dec. 1994. 3. A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Roy, and V. De, “Technology Scaling Behavior of Optimum Reverse...Body Bias for Standby Leakage Power Reduction in CMOS ICs,¿' 1999 mt. Symp. On Low Power Electronics and Design, p. 252, Aug. 1999. 4. AS Grove, Physics... | |
 | Mohab Anis, Mohamed I. Elmasry - 2003 - 248 lapas
...no.7, pp. 25-29, July 1999. S A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Roy, and V. Dc, “Technology Scaling Behavior of Optimum Reverse...for Standby Leakage Power Reduction in CMOS IC's” in Proc. IEEE International Symposium on Low Power Design and Electronics, pp. 252-254, August 1999.... | |
 | Mohab Anis, Mohamed I. Elmasry - 2003 - 248 lapas
...vol.36, no.7, pp. 25-29, July 1999. A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Roy, and V. De, 'Technology Scaling Behavior of Optimum Reverse Body...for Standby Leakage Power Reduction in CMOS IC's" in Proc. IEEE International Symposium on Low Power Design and Electronics, pp. 252-254, August 1999.... | |
 | Siva G. Narendra, Anantha P. Chandrakasan - 2006 - 308 lapas
...pp. 584-594, Apr. 1990. [19] A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Royi, and V. De, "Technology scaling behavior of optimum reverse body...for standby leakage power reduction in CMOS IC's," Proc. Low Power Electronics and Design, pp. 252-254, Aug. 1999. [20] A. Keshavarzi, S. Ma, S. Narendra,... | |
| |
