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" Circuits, 35, 1009, 2000. [17] Sirisantana, N., Wei, L., and Roy, K., High-performance low-power CMOS circuits using multiple channel length and multiple oxide thickness, Proc. 2000 Int. Conf on Computer Design, 227, Sept. "
Low-Power Electronics Design - 13-18. lappuse
laboja - 2018 - 912 lapas
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Multi-Threshold CMOS Digital Circuits: Managing Leakage Power

Mohab Anis, Mohamed I. Elmasry - 2003 - 248 lapas
...International Electron Devices Meeting, pp. 237—240,2001. [48] N. Sirisantana, L. Wei, and K. Roy, “High-Performance Low-Power CMOS Circuits Using...Multiple Channel Length and Multiple Oxide Thickness,” in Proceedings of the International Conftrence on Computer Design, pp. 227—232,2000. [49] 5. Parihar...
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Multi-Threshold CMOS Digital Circuits: Managing Leakage Power

Mohab Anis, Mohamed I. Elmasry - 2003 - 248 lapas
...International Electron Devices Meeting, pp. 237-240,2001. [48] N. Sirisantana, L. Wei, and K. Roy, "High-Performance Low-Power CMOS Circuits Using Multiple Channel Length and Multiple Oxide Thickness ," in Proceedings of the International Conference on Computer Design, pp. 227-232, 2000. [49] S. Parihar...
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