High Performance Computing – HiPC 2005: 12th International Conference, Goa, India, December 18-21, 2005, Proceedings

Pirmais vāks
David A. Bader, Manish Parashar, V. Sridhar, Viktor K. Prasanna
Springer, 2006. gada 18. okt. - 552 lappuses
This book constitutes the refereed proceedings of the 12th International Conference on High-Performance Computing, HiPC 2005, held in Goa, India in December 2005. The 50 revised full papers presented were carefully reviewed and selected from 362 submissions. After the keynote section and the presentation of the 2 awarded best contributions the papers are organized in topical sections on algorithms, applications, architecture, systems software, communication networks, and systems and networks.
 

Saturs

ed Location Identification Algorithm for Ad hoc Networks
63
lHOC Networks
65
Localization Algorithm for MANETs Based on Collapsing
73
Applications
82
oject
95
of Reduce Order Modeling to Time Parallelization
107
Decision Trees for ResourceConstrained Physiological
118
t Computing with Chip MultiThreading and Clusters
128
lution for Time Synchronization in Wireless Ad Hoc
323
for Boundary Discovery in Wireless Sensor Networks
343
Architecture
353
e and Power Evaluation of an Intelligently Adaptive Data
363
ial of OnChip Multiprocessing for QCD Machines
386
32bitx32bit Multiplier Design with Pipelined BlockWise
398
Communication Networks
407
ointtoPoint and Collective Communication Performance
421

Architecture
136
mance RDMA Based AlltoAll Broadcast for InfiniBand
148
Bloom Filter Operations to Network Processor for Parallel
170
ction Heuristic in SensOr Networks
191
Parallelizing LeftLooking Algorithms Using
211
sk DVS Algorithm Exploiting Program Path Locality
225
s in JavaSymphony
246
ttery Aware MAC Protocol for Minimizing Energy Latency
313
g and TrafficRedistribution Scheme for HighPerformance
432
tistage Interconnection Networks Architectures
453
ric Multiprocessors
465
Multiple Flows on Parallel Disks
479
Divisible Loads with Return Messages on Heterogeneous
498
a New Cluster Assignment and Scheduling Algorithm into
518
ysis System and Performance Improvement of iSCSI
538
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