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" EM Sentovich, KJ Singh, L. Lavagno, C. Moon. R. Murgai, A. Saldanha, H. Savoj, PR Stephan. RK Brayton, and AL Sangiovanni-Vincentelli. SIS: A System for Sequential Circuit Synthesis. "
ESL Design and Verification: A Prescription for Electronic System Level ... - 78. lappuse
autors: Grant Martin, Brian Bailey, Andrew Piziali - 2010 - 488 lapas
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Algorithms for Synthesis and Testing of Asynchronous Circuits

Luciano Lavagno, Alberto Sangiovanni-Vincentelli - 1993 - 339 lapas
...Chapter?. In C. Mead and L. Conway, editors, Introduction to VLSI Systems. Addison Wesley, 1981. [108] EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...A. Saldanha, H. Savoj, PR Stephan, RK Brayton, and A. SangiovanniVincentelli. SIS: A system for sequential circuit synthesis. Technical Report UCB/ERL...
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Logic Synthesis for Field-Programmable Gate Arrays

Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli - 1995 - 427 lapas
...Technical Report, Computer Research Lab., University of California, Santa Cruz, February 1992. [94] EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...A. Saldanha, H. Savoj, PR Stephan, RK Brayton, and A. Sangiovanni-Vincentelli. SIS: A System for Sequential Circuit Synthesis. Memorandum No. UCB/ERL...
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Formal Methods in Computer-Aided Design: First International ..., 1. sējums

Mandayam Srivas, Albert Camilleri, Calif.) Fmcad 9 (1996 Palo Alto - 1996 - 470 lapas
...Variable Ordering for Ordered Binary Decision Diagrams . In ICCAD, pages 42-47, November 1993. 22. EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...for Sequential Circuit Synthesis. Technical Report UCB/ERL M92/41, Electronics Research Lab, Univ. of California, Berkeley, CA 94720, May 1992. BDDs vs....
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Tools and Algorithms for the Construction and Analysis of Systems ..., 3. sējums

Ed Brinksma - 1997 - 431 lapas
...Analysis of cyclic combinational circuits. IEEE Trans. Computer-Aided Design, 13(7):950-956, 1994. 7. EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...for sequential circuit synthesis. Technical report, University of California at Berkeley, May 1992. 8. T. Shiple and G. Berry. Constructive analysis of...
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Satisfiability Problem: Theory and Applications : DIMACS Workshop, March 11 ...

Dingzhu Du, Jun Gu, Panos M. Pardalos - 1997 - 724 lapas
...Intelligence, pages 337-343, Seattle, July 1994. [476] B. Selman, Private Communication, 1995. [477] EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...A. Saldanha, H. Savoj, PR Stephan, RK Brayton. and A. Sangiovanni-Vincentelli. SIS : A System for Sequential Circuit Synthesis. Technical Report UCB/ERL...
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Hardware-Software Co-Design of Embedded Systems: The Polis Approach

F. Balarin, Paolo Giusto, Attila Jurecska, M. Chiodo, Claudio Passerone, Ellen Sentovich, Harry Hsieh, Luciano Lavagno, Bassam Tabbara, Alberto Sangiovanni-Vincentelli, Kei Suzuki - 1997 - 297 lapas
...and R. Reed, telecommunications systems engineering using SDL. North-Holland - Elsevier, 1989. [62] EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...A. Saldanha, H. Savoj, PR Stephan, RK Brayton, and A. SangiovanniVincentelli. SIS: A system for sequential circuit synthesis. Technical Report UCB/ERL...
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Computer Aided Verification: 10th International Conference, CAV ..., 10. sējums

Alan J. Hu, University of British Columbia. Dept. of Computer Science, University of British Columbia. Center for Integrated Computer Systems Research - 1998 - 552 lapas
...IDTC'96, Paris, France, 1996. [SSL+92] E. Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai, A. Aldanha, H. Savoj, PR Stephan, RK Brayton, and AL Sangiovanni-Vincentelli....for sequential circuit synthesis. Technical report memorandum nr. ucb/erl m92/41, University of California at Berkeley, 1992. [STB96] E. Sentovich, H....
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Synchronous Equivalence: Formal Methods for Embedded Systems

Harry Hsieh, Felice Balarin, Alberto Sangiovanni-Vincentelli - 2001 - 136 lapas
...simulation of sequential circuits. Informatique Theorique et Applications, 28(3-4): 1 5986, 1994. [38] EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai,...A. Saldanha, H. Savoj, PR Stephan, RK Brayton, and A. SangiovanniVincentelli. SIS: A system for sequential circuit synthesis. Technical Report UCB/ERL...
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Logic Synthesis and Verification

Soha Hassoun, Tsutomu Sasao - 2001 - 454 lapas
...for production logic synthesis." lBM J, Research & Development. 28i5l: 326-328. September l984. [9] EM Sentovich, KJ Singh. L. Lavagno. C. Moon. R. Murgai. A. Saldanha. H. Savoj, PR Stephan. RK Bray ton. and A. Sangiovanni-Vincentelli. "SlS: a system for sequential circuit synthesis." Memorandum...
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Logic Synthesis for Asynchronous Controllers and Interfaces: With 146 Figures

Jordi Cortadella, M. Kishinevsky, A. Kondratyev, Luciano Lavagno, Alex Yakovlev - 2002 - 273 lapas
...Y.Watanabe, LMGuerra, R. Brayton: IEEE Transactions on ComputerAided Design 15(7), 732-744 (1996) 137. EM Sentovich, KJ Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, PR Stephan, RK Brayton, A. Sangiovanni-Vincentelli: (1992), "SIS: A system for sequential circuit synthesis", Tech. rep., UC...
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