 | Varghese George, Jan M. Rabaey - 2001 - 196 lapas
...Programmable Logic Users, First Quarter, 1 998. [Yamauchi95l H. Yamauchi, H. Akamatsu, and T. Fujita, "An Asymptotically Zero Power ChargeRecycling Bus...Architecture for Battery-Operated Ultrahigh Data Rate ULSl's," IEEE Journal of Solid-State Circuits, vol. 30, no. 4, April 1995, pp. 423-431. [Zhang98l H.... | |
 | Christian Piguet - 2018 - 912 lapas
...Asia and South Pacific Design Automation Conf., Jan. 25-28, 2000, Yokohama, Japan, pp. 123-128. [31] H. Yamauchi et al., An asymptotically zero power charge-recycling bus architecture for batteryoperated ultra- high data rate ULSIs IEEE J. Solid-State Circuits, Vol. 30, Apr. 1995, pp. 423-431. [32] H.... | |
| |
An Asymptotically Zero Power Charge-Recycling Bus Architecture for Battery-Operated Ultra-High Data Rate ULSI's, 