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" J. Qian, S. Pullela, and L. Pillage, "Modeling the effective capacitance for the RC interconnect of CMOS gates, "
VLSI-SoC: Research Trends in VLSI and Systems on Chip: Fourteenth ... - 176. lappuse
laboja - 2010 - 394 lapas
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Low Power Design in Deep Submicron Electronics

W. Nebel, Jean Mermet - 1997 - 604 lapas
...Proc. ACM/ IEEE Design Automation Con}., 1993, pp. 165-170. 97. J. Qian, S. Pullela, and LT Pileggi, "Modeling the "Effective Capacitance" for the RC Interconnect of CMOS Gates," IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems, 13(12), Dec. 1994, pp. 1526-1535. 98. JM...
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Layout Optimization in VLSI Design

Bing Lu, Ding-Zhu Du, Sachin S. Sapatnekar - 2001 - 300 lapas
...Transactions on Computer- Aided Design, vol. 9, pp. 352-366, Apr. 1990. [13] J. Qian, S. Pullela, and LT Pillage, "Modeling the effective capacitance for the RC interconnect of CMOS gates," IEEE Transactions on Computer- Aided Design, vol. 13, pp. 1526-1535, Dec. 1994. [14] R. Gupta, B. Krauter....
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Memory, Microprocessor, and ASIC

Wai-Kai Chen - 2003 - 386 lapas
...Proc. lEEEIntl. Conf. Computer-Aided Design, pp. 512-515, Nov. 1989. 25. J. Qian, S. Pullela, and LT Pillage, Modeling the effective capacitance for the RC interconnect of CMOS gates, IEEE Trans. Computer-Aided Design, pp. 1526-1555, Dec. 1994. 26. F. Dartu, N. Menezes, J. Qian, and LT Pileggi,...
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Interconnect-Centric Design for Advanced SOC and NOC

Jari Nurmi - 2004 - 474 lapas
...the IEEE/ ACM International Conference on Computer- Aided Design, pp. 222-228, November 2000. [28] J. Qian, S. Pullela, and L. Pillage, "Modeling the...Capacitance' for the RC Interconnect of CMOS Gates," IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, Vol. 13, No. 12, pp. 1526-1535,...
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CMOS Electronics: How It Works, How It Fails

Jaume Segura, Charles F. Hawkins - 2004 - 370 lapas
...performance of high-speed digital circuits." IEEE Transactions on Computer-Aided Design. 21. 5. May 2002. 42. J. Qian. S. Pullela. and L. Pillage. "Modeling the...effective capacitance for the RC interconnect of CMOS gstes." IEEE Transactions on Computer-Aided Design. 12. 12. 1526-1535. December 1994. 43. W. Righter....
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Silicon Optoelectronic Integrated Circuits

Horst Zimmermann - 2004 - 376 lapas
...(Design Automation Conference), pp. 561-566, 2002. 249. J. Qian, S. Pullela, and L. Pillage, "Modelling the effective capacitance for the RC interconnect of CMOS gates", IEEE Trans. Computer- Aided Design of Integrated Circuits and Systems 13(12), pp. 1526-1535, 1994. 250. K. Janchitrapongvej,...
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