 | Christian Piguet - 2018 - 912 lapas
...Int. Symp. on Low-Power Electron. and Design, 2000, 90. [61] Kaxiras, S., Hu, Z., and Martonosi, M., Cache decay: exploiting generational behavior to reduce cache leakage power, in Proc. 28th Int. Symp. on Comput. Architecture, June 30-July 4, 2001, 240-251. [62] Zhou, H., et al. Adaptive mode control: a... | |
 | Thambipillai Srikanthan, Jingling Xue - 2005 - 850 lapas
...international conference on architectural support for programming languages and operating systems, 1991. 6. S. Kaxiras, Z. Hu, and M. Martonosi. Cache decay:...generational behavior to reduce cache leakage power. In Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001. 8. L. Li, I.... | |
 | Yann-Hang Lee, Heung-Nam Kim, Jong Kim, Yongwan Park, Laurence T. Yang, Sung Won Kim - 2007 - 829 lapas
...Circuit Technique to Reduce Leakage in Deep- Submicron Cache Memories, ISLPED2000, (2000) 90-95 4. S. Kaxiras, Z. Hu and M. Martonosi: Cache Decay: Exploiting...Generational Behavior to Reduce Cache Leakage Power. ISCA2001 (2001) 240-251 5. NS Kim, K Flautner, D. Blaauw, and T. Mudge: Circuit and Microarchitectural... | |
 | Mike O'Boyle, Francois Bodin, Marcelo Cintra, Sally A. McKee - 2007 - 368 lapas
...Prefetching. Proc.35th IEEE/ACM International Symposium on Microarchitecture, pp. 62-73, November 2002. 20. S. Kaxiras, Z. Hu, and M. Martonosi. Cache decay:...Generational Behavior to Reduce Cache Leakage Power. Proc. 28th International Symposium on Computer Architecture, pp. 240-251, June 2001. 21. M. Powell,... | |
 | Srinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna - 2007 - 687 lapas
...Symposium on Low Power Electronics and Design, pp. 90-95 (2000) [7] Kaxiras, S., Hu, Z., Martonosi, M.: Cache decay: Exploiting generational behavior to reduce cache leakage power. In: Proc. 36th IEEE/ACM International Symposium on Computer Architecture, pp. 240-251 (2001) [8] Huiyang, Z.,... | |
 | Koen De Bosschere, David Kaeli, Per Stenström, David Whalley, Theo Ungerer - 2007 - 307 lapas
...et al. Location cache: a low-power 12 cache system. In Proc. of ISLPED, 2004. 14. S. Kaxiras et al. Cache decay: exploiting generational behavior to reduce cache leakage power. In Proc. of the Int. Symp. of Computer Architecture, 2001. 15. S. Kaxiras et al. 4t-decay sensors: a new class... | |
 | Marvin Zelkowitz - 2011 - 342 lapas
...deep-submicron instruction cache", IEEE Trans. VLSI 9(1) (February 2001). [5] Kaxiras S., Hu Z., Martonosi M., "Cache decay: Exploiting generational behavior to reduce cache leakage power", in: Proc. oflSCA, 2001. [6] Zhou H., Toburen MC, Rotenberg E., Conte TM, "Adaptive mode control: A static power-efficient... | |
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S. Kaxiras, Z. Hu, and M. Martonosi. Cache decay: Exploiting generational behavior to reduce cache leakage power. 