CODES+ISSSACM Press, 2005 |
No grāmatas satura
1.–3. rezultāts no 19.
113. lappuse
... objects that arrived at the buffer B during the time interval [ 0 , t ] , whereas e ( k ) denotes the total number of execution cycles requested from the processor by k con- secutive stream objects starting from the first stream object ...
... objects that arrived at the buffer B during the time interval [ 0 , t ] , whereas e ( k ) denotes the total number of execution cycles requested from the processor by k con- secutive stream objects starting from the first stream object ...
149. lappuse
... object , such as a person or vehicle . The tracking granularity requirement demands one image sample per meter of distance traveled by the object , in order to have a trace of the object's trajectory accurate to within one meter ...
... object , such as a person or vehicle . The tracking granularity requirement demands one image sample per meter of distance traveled by the object , in order to have a trace of the object's trajectory accurate to within one meter ...
246. lappuse
... object reference there are no pointers in Java - requires calling the JNI function . This discipline also maintains memory consistency , since the garbage collector does not move the acquired objects until their release . Coprocessor ...
... object reference there are no pointers in Java - requires calling the JNI function . This discipline also maintains memory consistency , since the garbage collector does not move the acquired objects until their release . Coprocessor ...
Saturs
Keynote | 3 |
A Core Flight Software System | 13 |
A CycleAccurate Compilation Algorithm for Custom Pipelined Datapaths | 21 |
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abstraction algorithm allocation analysis application approach architecture benchmarks binary biochips buffer byte cache channel chip circuit clock communication compiler components compression Computer configuration constraints copies coprocessor core CRAMES cycle cycle accurate simulation data block decoder digital microfluidic DVFS dynamic Echo instructions EEMBC efficient embedded systems energy consumption execution FPGA function graph hardware hash IEEE implementation input instruction-set interface iteration latency loop mapping marked graph memory accesses methodology microblaze microfluidic minimal minterms minterms module multiplier multiprocessor node on-chip operations optimal output overhead packet parallel parameters partition performance pipeline platform port power consumption Proc processor proposed reconfigurable reduce resource router runtime samples scheduling SECTAG Section SELinux simulation space specific speedup switch synchronization synthesis SystemC Table target task techniques tion transaction universal hash functions vector VLIW voltage WCET Xilinx