CODES+ISSSACM Press, 2005 |
No grāmatas satura
1.3. rezultāts no 71.
20. lappuse
... latency could be strongly reduced by using a pipelined architecture . Signif- icant performance improvements can be achieved by extending the memory width to four data words , as implemented in the third design alternative . In this ...
... latency could be strongly reduced by using a pipelined architecture . Signif- icant performance improvements can be achieved by extending the memory width to four data words , as implemented in the third design alternative . In this ...
31. lappuse
... latency of 121 c- steps [ 12 ] , ARFILT is an autoregressive filter with 28 operations and minimum latency of 8 c - steps [ 13 ] , FDCT is a Fast Discrete Fourier Transform instance with 42 operations and minimum latency of 6 c - steps ...
... latency of 121 c- steps [ 12 ] , ARFILT is an autoregressive filter with 28 operations and minimum latency of 8 c - steps [ 13 ] , FDCT is a Fast Discrete Fourier Transform instance with 42 operations and minimum latency of 6 c - steps ...
233. lappuse
... latency of an uncongested tree , T ( k , b1 , .. , bk ) , as : any_req HS cntri < ack out R 5.1 E → data out G req ... latency and cycle time . The forward latency is the latency through the node when there is no congestion , while the ...
... latency of an uncongested tree , T ( k , b1 , .. , bk ) , as : any_req HS cntri < ack out R 5.1 E → data out G req ... latency and cycle time . The forward latency is the latency through the node when there is no congestion , while the ...
Saturs
Keynote | 3 |
A Core Flight Software System | 13 |
A CycleAccurate Compilation Algorithm for Custom Pipelined Datapaths | 21 |
Autortiesības | |
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