CODES+ISSSACM Press, 2005 |
No grāmatas satura
1.–3. rezultāts no 77.
106. lappuse
... computation- dominant programs and compound programs based on the charac- teristics of slack . We discuss the appropriate V / f assignments for each category . Then we propose a behavior - aware DVFS policy to approximate the maximum ...
... computation- dominant programs and compound programs based on the charac- teristics of slack . We discuss the appropriate V / f assignments for each category . Then we propose a behavior - aware DVFS policy to approximate the maximum ...
107. lappuse
... Computation - dominant Programs Computation - dominant programs have the following character- istics : 1. The amount of slack produced by memory accesses is negli- gible . 2. The execution time can be represented by Ntotal / f , which ...
... Computation - dominant Programs Computation - dominant programs have the following character- istics : 1. The amount of slack produced by memory accesses is negli- gible . 2. The execution time can be represented by Ntotal / f , which ...
108. lappuse
... computation - dominant scaling units can be identified in terms of the memory stall ratio . Note that IPC ( instruction per cycle ) or CPI ( cycle per instruc- tion ) cannot be used to distinguish memory - bound scaling units and ...
... computation - dominant scaling units can be identified in terms of the memory stall ratio . Note that IPC ( instruction per cycle ) or CPI ( cycle per instruc- tion ) cannot be used to distinguish memory - bound scaling units and ...
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abstraction algorithm allocation analysis application approach architecture benchmarks binary biochips buffer byte cache channel chip circuit clock communication compiler components compression Computer configuration constraints copies coprocessor core CRAMES cycle cycle accurate simulation data block decoder digital microfluidic DVFS dynamic Echo instructions EEMBC efficient embedded systems energy consumption execution FPGA function graph hardware hash IEEE implementation input instruction-set interface iteration latency loop mapping marked graph memory accesses methodology microblaze microfluidic minimal minterms minterms module multiplier multiprocessor node on-chip operations optimal output overhead packet parallel parameters partition performance pipeline platform port power consumption Proc processor proposed reconfigurable reduce resource router runtime samples scheduling SECTAG Section SELinux simulation space specific speedup switch synchronization synthesis SystemC Table target task techniques tion transaction universal hash functions vector VLIW voltage WCET Xilinx