CODES+ISSSACM Press, 2005 |
No grāmatas satura
1.–3. rezultāts no 82.
96. lappuse
... table Free Time 1 T 0 0.0001 0.0002 0.0003 0.0004 0 0.2 0.4 1 0.6 0.8 1.2 1.4 1.6 Allocation / Free Time ( sec ) Memory Usage ( TotalBytes / rm - 64KB ) Handle requests Get page addr and size from mapping table Read Request page N Write ...
... table Free Time 1 T 0 0.0001 0.0002 0.0003 0.0004 0 0.2 0.4 1 0.6 0.8 1.2 1.4 1.6 Allocation / Free Time ( sec ) Memory Usage ( TotalBytes / rm - 64KB ) Handle requests Get page addr and size from mapping table Read Request page N Write ...
277. lappuse
... table are the full 32 bits in length - hence the trie lookup algorithm takes 7 memory accesses to find the next hop . ( c ) Results of the prefix search algorithm are not cached algorithm must be executed for every packet header . We do ...
... table are the full 32 bits in length - hence the trie lookup algorithm takes 7 memory accesses to find the next hop . ( c ) Results of the prefix search algorithm are not cached algorithm must be executed for every packet header . We do ...
323. lappuse
... table . When a new phase is inserted into the phase signature table , it is marked as not having a sample . If we predict that a phase ID without a sample is coming next , then we switch to cycle accurate simulation for that interval ...
... table . When a new phase is inserted into the phase signature table , it is marked as not having a sample . If we predict that a phase ID without a sample is coming next , then we switch to cycle accurate simulation for that interval ...
Saturs
Keynote | 3 |
A Core Flight Software System | 13 |
A CycleAccurate Compilation Algorithm for Custom Pipelined Datapaths | 21 |
Autortiesības | |
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