Parallel Computer Routing and Communication: First International Workshop, PCRCW '94, Seattle, Washington, USA, May 16-18, 1994. Proceedings
Springer Science & Business Media, 1994. gada 28. sept. - 317 lappuses
This volume contains revised versions of the 23 regular papers presented at the First International Workshop on Parallel Computer Routing and Communication (PCRCW '94), held in Seattle, Washington in May 1994.
Routing for parallel computer communication has recently experienced almost explosive activity: ever increasing processor speeds are placing greater demands on interprocessor communication, while technological advances offer new capabilities to respond to those demands. The contributions from industry and academia cover all areas, from details of hardware design to proofs of theoretical results. There are also many papers dealing with the performance of various adaptive routing schemes, new network topologies, network interfaces, and fault-tolerant issues.
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Do Faster Routers Imply Faster Communication?
Fast Arbitration in Dilated Routers
Performance Analysis of a Minimal Adaptive Router
Performance Evaluation of Adaptive Routing Algorithms for k_ary n_cubes
The Performance of Adaptive Routers on Worst Case Permutations
On the Effect of Queue Sizes and Channel Scheduling Policies in the Segment Router
An Optoelectronic Interconnection Network
Three_Dimensional Network Topologies
Congestion_Free Routing on the CM5 Data Router
A Class of Efficient Minimal Routing Algorithms
Packaging and Multiplexing of Hierarchical Scalable Expanders
Guaranteeing Idempotence for TightlyCoupled FaultTolerant Networks
Design of a Router for FaultTolerant Networks
A Reliable and High_Performance Communication Substrate for Parallel Computers
Network Interface Support for UserLevel Buffer Management
An Interface for Message Passing on Adaptive Packet Routing Networks
Support for Multiple Classes of Traffic in Multicomputer Routers
Multidestination Message Passing Mechanism Conforming to Base Wormhole Routing Scheme
Multi_Address Encoding for Multicast
Routing Algorithms for IBM SP1
Optimized Routing in the Cray T3D
A Damped Adaptive Router Design
Arctic Routing Chip
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adaptive algorithm adaptive routing adaptive routing algorithms allocation Andre DeHon Architecture bandwidth best-effort bit string buffer butterfly bytes Chaos router chip communication component Computer congestion cost Cranium crossbar cube cycle deadlock deadlock-free delivery derouting destination node deterministic routing dilation dimension e-cube encoding fault tolerance FIFO flit guaranteed hardware header hypercube idempotent IEEE implementation injection input port interconnection networks latency livelock load logical long messages machine mapping memory mesh message passing messaging layer metabutterfly metanode multibutterfly multicast multicomputer multidestination multiple region multiplexing multiprocessor network interface oblivious offset-cube optimized output frame output port overhead packet switching Parallel parallel computers path performance permutations physical channel Proc Proceedings processing processor protocol queue random receive requires ROMM routing algorithm routing scheme Section Segment router shown in Figure simulation Symposium throughput topologies torus traffic virtual channels virtual cut-through wires workload wormhole routing