Advances in Computers: Architectural AdvancesMarvin Zelkowitz Elsevier, 2011. gada 21. sept. - 342 lappuses The series covers new developments in computer technology. Most chapters present an overview of a current subfield within computers, with many citations, and often include new developments in the field by the authors of the individual chapters. Topics include hardware, software, theoretical underpinnings of computing, and novel applications of computers. This current volume emphasizes architectural advances and includes five chapters on hardware development, games for mobile devices such as cell phones, and open source software development. The book series is a valuable addition to university courses that emphasize the topics under discussion in that particular volume as well as belonging on the bookshelf of industrial practitioners who need to implement many of the technologies that are described.
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1.–5. rezultāts no 33.
... simulation details and the evaluation metrics. 3.2.1.1. Supporting. Multi-Programming. The primary issue when using heterogeneous cores for greater throughput is with the scheduling, or assignment, of jobs to particular cores. We assume a ...
... simulate the various multi-core architectures. The Simpoint tool [78] was used to find good representative fast-forward distances for each benchmark (how far to advance the program before beginning measured simulation). Unless otherwise ...
... simulated) when determining the static assignment of workloads to cores. This simplification allows us to find the best configuration (defined as the one which maximizes weighted speedup) by simply running each job alone on each of our ...
... simulate are roughly modeled after cores of EV4 (Alpha 21064), EV5 (Alpha 21164), EV6 (Alpha 21264) and EV8-. EV8 ... simulated cores were determined using CACTI [80]. Memory latency was set to be 150 ns. TABLE II CONFIGURATION OF THE ...
... simulation. After fast-forwarding, we simulate 1 billion instructions. All benchmarks are simulated using ref inputs. 3.3.5. Scheduling. for. Power: Analysis. and. Results. This section examines the effectiveness of single-ISA heterogeneous ...
Saturs
Chapter 2 Designing Computational Clusters for Performance and Power | 89 |
Chapter 3 CompilerAssisted Leakage Energy Reduction for Cache Memories | 155 |
Challenges and Opportunities | 191 |
Recent Research Results and Methods | 243 |
Author Index | 297 |
Subject Index | 307 |
Contents of Volumes in this Series | 319 |
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Advances in Computers: Architectural Advances Marvin Zelkowitz, Ph.D., MS, BS. Priekšskatījums nav pieejams - 2007 |
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