Advances in Computers: Architectural AdvancesMarvin Zelkowitz Elsevier, 2011. gada 21. sept. - 342 lappuses The series covers new developments in computer technology. Most chapters present an overview of a current subfield within computers, with many citations, and often include new developments in the field by the authors of the individual chapters. Topics include hardware, software, theoretical underpinnings of computing, and novel applications of computers. This current volume emphasizes architectural advances and includes five chapters on hardware development, games for mobile devices such as cell phones, and open source software development. The book series is a valuable addition to university courses that emphasize the topics under discussion in that particular volume as well as belonging on the bookshelf of industrial practitioners who need to implement many of the technologies that are described.
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1.–5. rezultāts no 22.
... multiprocessor that integrated four 250 MHz MIPS cores on the same die. The cores each had 8 KB private instruction and data caches and shared a 128 KB level-2 cache. Hydra was focused not only on providing hardware parallelism for ...
... multiprocessor that consists of one two-way simultaneous multithreading (SMT) [90,89] dual-issue Power core and eight dualissue SIMD (single instruction, multiple data) style Synergistic Processing Element (SPE) cores on the same die ...
... multiprocessor with multiple, diverse processor cores. These cores all execute the same instruction set, but include significantly different resources and achieve different performance and energy efficiency on the same application ...
... multiprocessor chips. They show that asymmetric core clusters are expected to achieve higher performance per area and higher performance for a given power envelope. Annavaram et al. [20] evaluate the benefits of heterogeneous ...
... multiprocessors using x86 cores was 4–6X, significantly more than the next best technique (which was voltage/frequency ... multiprocessor with cores belonging to different ISAs. 3.5. Designing. Multi-Cores. from. the. Ground. Up. While the ...
Saturs
Chapter 2 Designing Computational Clusters for Performance and Power | 89 |
Chapter 3 CompilerAssisted Leakage Energy Reduction for Cache Memories | 155 |
Challenges and Opportunities | 191 |
Recent Research Results and Methods | 243 |
Author Index | 297 |
Subject Index | 307 |
Contents of Volumes in this Series | 319 |
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Advances in Computers: Architectural Advances Marvin Zelkowitz, Ph.D., MS, BS. Priekšskatījums nav pieejams - 2007 |
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