Advances in Computers: Architectural AdvancesMarvin Zelkowitz Elsevier, 2011. gada 21. sept. - 342 lappuses The series covers new developments in computer technology. Most chapters present an overview of a current subfield within computers, with many citations, and often include new developments in the field by the authors of the individual chapters. Topics include hardware, software, theoretical underpinnings of computing, and novel applications of computers. This current volume emphasizes architectural advances and includes five chapters on hardware development, games for mobile devices such as cell phones, and open source software development. The book series is a valuable addition to university courses that emphasize the topics under discussion in that particular volume as well as belonging on the bookshelf of industrial practitioners who need to implement many of the technologies that are described.
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No grāmatas satura
1.–5. rezultāts no 72.
... Multi-Core Processors: A Holistic Approach Rakesh Kumar and Dean M. Tullsen 1. Introduction ... Architectures . . . . . . . 9 4. Amortizing Overprovisioning through Conjoined Core Architectures . . . 45 5. Holistic Design of the Multi ...
... architecture of multithreading processors of all types (including simultaneous multithreading, multi-core, or the gray area in between), compiling for such architectures, and high performance architectures in general. Wei Zhang received ...
... Architecture of Efficient Multi-Core Processors: A Holistic Approach” by Rakesh Kumar and Dean M. Tullsen discusses the recent development of multicore processors. Moore's Law, essentially the doubling of computer power every 18 months ...
Architectural Advances Marvin Zelkowitz. of 108 cycles per second), one way to increase processor performance is to keep a copy of part of main memory ... Architecture of Efficient Multi-Core Processors: A Holistic Approach RAKESH xiv ...
... multi-core architecture is to replicate an off-the-shelf core design multiple times, and then connect the cores together using an interconnect mechanism. However, this methodology is “multi-core oblivious” as subsystems are designed ...
Saturs
Chapter 2 Designing Computational Clusters for Performance and Power | 89 |
Chapter 3 CompilerAssisted Leakage Energy Reduction for Cache Memories | 155 |
Challenges and Opportunities | 191 |
Recent Research Results and Methods | 243 |
Author Index | 297 |
Subject Index | 307 |
Contents of Volumes in this Series | 319 |
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Advances in Computers: Architectural Advances Marvin Zelkowitz, Ph.D., MS, BS. Priekšskatījums nav pieejams - 2007 |
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