Advances in Computers: Architectural AdvancesMarvin Zelkowitz Elsevier, 2011. gada 21. sept. - 342 lappuses The series covers new developments in computer technology. Most chapters present an overview of a current subfield within computers, with many citations, and often include new developments in the field by the authors of the individual chapters. Topics include hardware, software, theoretical underpinnings of computing, and novel applications of computers. This current volume emphasizes architectural advances and includes five chapters on hardware development, games for mobile devices such as cell phones, and open source software development. The book series is a valuable addition to university courses that emphasize the topics under discussion in that particular volume as well as belonging on the bookshelf of industrial practitioners who need to implement many of the technologies that are described.
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1.5. rezultāts no 38.
... metric. 2.1. Early. Multi-Core. Efforts. This section provides an overview of some of the visible general-purpose multicore projects that have been undertaken in academia and industry. It does not describe all multi-core designs, but is ...
... metrics. 3.2.1.1. Supporting. Multi-Programming. The primary issue when using heterogeneous cores for greater throughput is with the scheduling, or assignment, of jobs to particular cores. We assume a scheduler at the operating system ...
... Metrics. In a study like this, IPC (number of total instructions committed per cycle) is not a reliable metric as it would inordinately bias all the heuristics (and policies) against inherently slow-running threads. Any policy that ...
Architectural Advances Marvin Zelkowitz. metric makes it difficult to produce artificial speedups by simply favoring high-IPC threads. 3.2.2 Scheduling for Throughput: Analysis and Results In this section, we demonstrate the performance ...
... metric ensures that those jobs assigned to the EV5 are those that are least affected (in relative IPC) by the difference between EV6 and EV5. In both the homogeneous and heterogeneous cases, once all the contexts of a processor get used ...
Saturs
Chapter 2 Designing Computational Clusters for Performance and Power | 89 |
Chapter 3 CompilerAssisted Leakage Energy Reduction for Cache Memories | 155 |
Challenges and Opportunities | 191 |
Recent Research Results and Methods | 243 |
Author Index | 297 |
Subject Index | 307 |
Contents of Volumes in this Series | 319 |
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