Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line MonitoringSpringer Science & Business Media, 2008. gada 1. jūn. - 280 lappuses Assertion-based design is a powerful new paradigm that is facilitating quality improvement in electronic design. Assertions are statements used to describe properties of the design (I.e., design intent), that can be included to actively check correctness throughout the design cycle and even the lifecycle of the product. With the appearance of two new languages, PSL and SVA, assertions have already started to improve verification quality and productivity. This is the first book that presents an “under-the-hood” view of generating assertion checkers, and as such provides a unique and consistent perspective on employing assertions in major areas, such as: specification, verification, debugging, on-line monitoring and design quality improvement. |
No grāmatas satura
1.–5. rezultāts no 83.
... produce. Readers wishing to explore other ideas to help improve the effectiveness of debugging with checkers, and/or those wanting to explore how checkers can play a greater role in debugging fabricated silicon will find Chapter 7 of ...
... produced are well- suited for pragmatic checker-based verification. The checker generator described in this book is also meant to be independent of any third party software packages, and can more easily be integrated as a module in ...
... produce. We also thank Mr. Chenard for many fruitful discussions and suggestions for improving the usability of MBAC. Thanks to Stephan Bourduas, Jean-Samuel Chenard and Nathaniel Azuelos for being the first to stress the checker ...
... producing high-quality ICs that come as close as economically possible to a perfectly working device has become of paramount importance in the semiconductor industry. In many cases the importance is of an economic nature, as product ...
... producing faulty devices, the electronics indus- try is constantly seeking ways to improve the quality of delivered ... produce the specification for design teams, and can often be finished only after the product is deployed in its ...
Saturs
1 | |
13 | |
Basic Techniques Behind Assertion Checkers | 37 |
PSL and SVA Assertion Languages | 55 |
Automata for Assertion Checkers | 83 |
Construction of PSL Assertion Checkers | 105 |
Enhanced Features and Uses of PSL Checkers | 155 |
Evaluating and Verifying PSL Assertion Checkers | 179 |
Checkers for System Verilog Assertions | 207 |
Conclusions and Future Work | 251 |
A Example for UpDown Counter | 259 |
References | 265 |
Index | 275 |
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Generating Hardware Assertion Checkers: For Hardware Verification, Emulation ... Marc Boulé,Zeljko Zilic Priekšskatījums nav pieejams - 2010 |
Generating Hardware Assertion Checkers: For Hardware Verification, Emulation ... Marc Boulé,Zeljko Zilic Priekšskatījums nav pieejams - 2008 |