Embedded Computing: A VLIW Approach to Architecture, Compilers and ToolsElsevier, 2005. gada 19. janv. - 712 lappuses The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. · Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book· Combines technical depth with real-world experience · Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. · Uses concrete examples to explain and motivate the trade-offs. |
No grāmatas satura
1.–5. rezultāts no 16.
21. lappuse
... FPGA (field-programmable gate array) and PLD (programmable logic device) are often used interchangeably. They historically derive from the fundamental technologies that differentiate the two major competitors in the arena: Xilinx with FPGA ...
... FPGA (field-programmable gate array) and PLD (programmable logic device) are often used interchangeably. They historically derive from the fundamental technologies that differentiate the two major competitors in the arena: Xilinx with FPGA ...
27. lappuse
... FPGA design is usually the best choice. FPGAs can have a major impact on reducing the NRE of a product. They can be reworked very quickly and cheaply, and are tolerant to evolving standards and last-minute changes to future sets. A few ...
... FPGA design is usually the best choice. FPGAs can have a major impact on reducing the NRE of a product. They can be reworked very quickly and cheaply, and are tolerant to evolving standards and last-minute changes to future sets. A few ...
28. lappuse
... (FPGA), sudden drifts in market demands (evolving standards), and changes in manufacturing scenarios (fab pressure) occur. 1.4.4. Software. and. the. Embedded. Software. Market. The cost of software in an embedded system should not be ...
... (FPGA), sudden drifts in market demands (evolving standards), and changes in manufacturing scenarios (fab pressure) occur. 1.4.4. Software. and. the. Embedded. Software. Market. The cost of software in an embedded system should not be ...
42. lappuse
... FPGA-only approach, and the hybrid approach that initially deploys FPGAs and then switches over to ASICs later in the 21. 22. production run. Repeat the exercise for XXX = 42 CHAPTER 1 An Introduction to Embedded Processing.
... FPGA-only approach, and the hybrid approach that initially deploys FPGAs and then switches over to ASICs later in the 21. 22. production run. Repeat the exercise for XXX = 42 CHAPTER 1 An Introduction to Embedded Processing.
79. lappuse
... FPGAs, VLIWs, and RISC processors. Rank them with respect to cost, peak performance, field upgradeability, and time-to-market. Amdahl's law states that if you speed up portions of a program eventually the parts you do not speed up will ...
... FPGAs, VLIWs, and RISC processors. Rank them with respect to cost, peak performance, field upgradeability, and time-to-market. Amdahl's law states that if you speed up portions of a program eventually the parts you do not speed up will ...
Saturs
1 | |
45 | |
83 | |
Chapter 4 Architectural Structures in ISA Design | 125 |
Chapter 5 Microarchitecture Design | 179 |
Chapter 6 System Design and Simulation | 231 |
Chapter 7 Embedded Compiling and Toolchains | 287 |
Chapter 8 Compiling for VLIWs and ILP | 337 |
Chapter 9 The Runtime System | 399 |
Chapter 10 Application Design and Customization | 443 |
Chapter 11 Application Areas | 493 |
Appendix A The VEX System | 539 |
Appendix B Glossary | 607 |
Appendix C Bibliography | 631 |
Index | 661 |
Citi izdevumi - Skatīt visu
Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools Joseph A. Fisher,Paolo Faraboschi,Cliff Young Ierobežota priekšskatīšana - 2005 |
Embedded Computing: A Vliw Approach to Architecture, Compilers and Tools Joseph A. Fisher,Paolo Faraboschi,Cliff Young Priekšskatījums nav pieejams - 2004 |
Bieži izmantoti vārdi un frāzes
algorithms allow assembly language basic blocks bits branch bytes cache called Chapter chip CISC cluster cmpx compiled simulator complex components compression computing cost cycle datapath debugging decoding dependences described devices disk dynamic embedded domain embedded systems encoding engineering example exception execution Figure floating-point FPGA functional units general-purpose global hardware implementation inline instruction set integrated interface issue iterations Java latency load logic loop machine memory accesses micro-SIMD microarchitecture Multiflow multiple multiprocessing opcode operands operating system optimizations parallel path performance phase pointer pragma predication prefetch problem processor core region register allocation register file require RISC run-time Section single slots software pipelining specific speculation standard superscalar target task techniques tion today’s toolchain types typically unrolling variable vector virtual memory VLIW VLIW architectures