PARLE '94 Parallel Architectures and Languages Europe: 6th International PARLE Conference, Athens, Greece, July 4 - 8, 1994. ProceedingsCostas Halatsis Springer Science & Business Media, 1994. gada 8. jūn. - 836 lappuses This volume presents the proceedings of the 5th International Conference Parallel Architectures and Languages Europe (PARLE '94), held in Athens, Greece in July 1994. PARLE is the main Europe-based event on parallel processing. Parallel processing is now well established within the high-performance computing technology and of stategic importance not only to the computer industry, but also for a wide range of applications affecting the whole economy. The 60 full papers and 24 poster presentations accepted for this proceedings were selected from some 200 submissions by the international program committee; they cover the whole field and give a timely state-of-the-art report on research and advanced applications in parallel computing. |
No grāmatas satura
1.5. rezultāts no 81.
xi. lappuse
Atvainojiet, šīs lappuses saturs ir ierobežots..
Atvainojiet, šīs lappuses saturs ir ierobežots..
xii. lappuse
Atvainojiet, šīs lappuses saturs ir ierobežots..
Atvainojiet, šīs lappuses saturs ir ierobežots..
46. lappuse
Atvainojiet, šīs lappuses saturs ir ierobežots..
Atvainojiet, šīs lappuses saturs ir ierobežots..
50. lappuse
Atvainojiet, šīs lappuses saturs ir ierobežots..
Atvainojiet, šīs lappuses saturs ir ierobežots..
60. lappuse
Atvainojiet, šīs lappuses saturs ir ierobežots..
Atvainojiet, šīs lappuses saturs ir ierobežots..
Saturs
Improved Probabilistic Routing on Generalized Hypercubes | 1 |
Efficient Data Communication in Incomplete Hypercubes | 13 |
Efficient Communication in the Folded Petersen Interconnection Networks | 25 |
Compiling Rewriting onto SIMD and MIMDSIMD Machines | 37 |
A Compilation Technique for Varying Communication Cost NUMA Architectures | 49 |
A Data Partitioning Algorithm for Distributed Memory Compilation | 61 |
Towards a High Precision Massively Parallel Computer | 73 |
On the Testability of Purely Recursive Digital Filters | 85 |
Sparse Generalized HyperGrids for Performance Scalability | 526 |
A Distributed Garbage Collector for Active Objects | 539 |
A Viable Way for Massive Parallelism | 553 |
Implementation of GTS | 565 |
A Hierarchical Activation Management Technique for FineGrain Multithreaded Execution | 577 |
Scheduling Task Graphs Onto Distributed Memory Multiprocessors Under Realistic Constraints | 589 |
A Dynamic Algorithm for Online Scheduling of Parallel Processes | 601 |
A Synchronous Calculus of Parallel Communicating Reactive Automata | 611 |
Voting on Synchronous Communications | 97 |
A Parallel Technique to Reduce the Reachability Tree | 109 |
Optimal Parallel Execution of Complete Binary Trees and Grids into Most Popular Interconnection Networks | 122 |
TimeOptimal NearestNeighbor Computations on Enhanced Meshes | 134 |
Simulation of PRAM Models on Meshes | 146 |
On the Multisearching Problem for Hypercubes | 159 |
Code Liberation A Tool for Refitting Code to a Parallel Environment | 167 |
HighLevel Visualisation of Parallel Logic Program Execution | 180 |
A Prototyping Environment for Visualization Development | 192 |
A Formal Approach to Modeling Expected Behavior in Parallel Program Visualizations | 202 |
An Improvement in the SizeDepth Tradeoff for Strictly NonBlocking GeneralizedConcentration Networks | 214 |
Bypass Strategy in Hypercube Multiprocessors by adding Bus Connections | 226 |
A Hybrid Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Connections | 238 |
A Sequential Language for Parallel Matrix Computations | 250 |
Static Communications in Parallel Scientific Programs | 262 |
Load Balancing for Extrapolation Methods on Distributed Memory Multiprocessors | 277 |
On the Definition of Speedup | 289 |
Petri Net Performance Models of Parallel Systems Methodology and Case Study | 301 |
RunTime Optimization of Sparse MatrixVector Multiplication on SIMD Machines | 313 |
Strip Mining Redistribution | 323 |
Analytic Model of a Cache Only Memory Architecture | 336 |
Memory Assignment for Multiprocessor Caches Through Grey Coloring | 351 |
An Adaptive UpdateBased Cache Coherence Protocol for Reduction of Miss Rate and Traffic | 363 |
Eliminating Invalidation in CoherentCache Parallel Graph Reduction | 375 |
Enhancing Parallelism by Removing Cyclic Data Dependencies | 387 |
An InteractionBased Language and Its Typing System | 398 |
On the Parallelism of Data | 414 |
Predicative Polymorphism in 𝝅Calculus | 425 |
Improving the Execution of the Dependent AridParallel Prolog DDAS | 438 |
ORParallel Prolog on Distributed Memory Systems | 453 |
Efficient Distributed Memory Implementation of a Data Parallel Functional Language | 464 |
Modelling Photochemical Pollution using Parallel and Distributed Computing Platforms | 478 |
Parallel Algorithms and Interval Selection Strategies for Globally Adaptive Quadrature | 490 |
Systolic Designs for Evaluating Linear Combinations of Chebyshev Polynomials | 502 |
The Impact of the KSR1 Allcache Architecture on the Behaviour of the DBS3 Parallel DBMS | 514 |
Deriving Histories of Nets with Priority Relation | 623 |
What Do You Get from a 𝝅calculus Semantics? | 635 |
An Effective Model of Concurrency | 648 |
ObjectAffinity Scheduling and Continuation Passing on Multiprocessors | 661 |
Dynamic Allocation of Communication Bandwidth in Multicomputers | 677 |
LoadBalanced Priority Queues on Distributed Memory Machines | 689 |
Jordan Normal Form of Matrices | 701 |
Batch Dynamic Algorithms for Two Graph Problems | 713 |
A General Method for Maximizing the ErrorDetecting Ability of Distributed Algorithms | 725 |
A Massively Agent Execution System for Logic Programming | 737 |
Checking the Serial Correctness of ControlParallel Programs | 741 |
NXLib A Parallel Programming Environment for Workstation Clusters | 745 |
Applying Human Factors Techniques to the Design of a Tool for Parallel Program Performance Analysis and Tuning | 749 |
An ActorBased Programming System for Heterogeneous Processing | 753 |
Introducing Fairness in CSP Systems Specified with State Variables | 757 |
A Dataflowbased Massively Parallel Programming Language and Its Implementation | 761 |
Using Subpages for Coherency Control in Parallel Database Systems | 765 |
A New MultiDimensional Interconnection Network for SIMD Architectures | 769 |
A Scalable BitSequential SIMD Architecture for Pattern Recognition | 773 |
An Iterative Array Processor Architecture For Matrix Computation | 777 |
A FineGrain Massively Parallel Architecture | 781 |
From BSP to a Virtual von Neumann Machine | 785 |
Data Parallel Relational Database Processing on the Connection Machine CM2 with Data Vault | 789 |
A Loop Allocation Policy | 793 |
Using Parallel Simulated Annealing in the Mapping Problem | 797 |
A New Parallel MIMD Connected Component Labeling Algorithm | 801 |
Using Reference Counters in UpdateBased Coherent Memory | 805 |
Compositional Reasoning About RealTime Distributed Systems with Limited Resources | 809 |
Dynamic Load Balancing on a VirtuallyShared Memory Parallel Computer System | 813 |
Analysing the Load Balancing Scheme of a Parallel System on Multiprocessors | 819 |
Performance of Interconnection Network in Multithreaded Architectures | 823 |
Scheduling Algorithms Performance with the pSystem Parallel Programming Environment | 827 |
A New Routing Scheme for Concatenating Two Omega Networks | 831 |
| 835 | |
Citi izdevumi - Skatīt visu
Bieži izmantoti vārdi un frāzes
Abstract and-goal applications architecture array assignment block broadcasting cache cell communication compiler Computer Science concurrent data tiles defined delay denote dependence Distributed Computing distributed memory distributed shared memory dynamic edge efficient elements evaluation example execution Figure function garbage collector global garbage heuristic hypercube hypergrid IEEE implementation input interconnection network iterations language latency Lemma load balancing loop machine mapping matrix mesh multiple multiprocessor node number of processors objects operation optimal overhead packets parallel algorithms parallel computer parallel program partitioning performance Petri net phase polynomial PRAM priority priority queue problem Proc protocol queue redistribution reduce reference rewriting routing scheduling scheme Section sequence sequential shared memory SIMD simulation sparse sparse matrix specification speedup static step strategy structure synchronization task graph technique Theorem threads topology tree updated variables vector virtual channels visualization