Field-Programmable Gate ArraysSpringer Science & Business Media, 1992. gada 30. jūn. - 206 lappuses Field-Programmable Gate Arrays (FPGAs) have emerged as an attractive means of implementing logic circuits, providing instant manufacturing turnaround and negligible prototype costs. They hold the promise of replacing much of the VLSI market now held by mask-programmed gate arrays. FPGAs offer an affordable solution for customized VLSI, over a wide variety of applications, and have also opened up new possibilities in designing reconfigurable digital systems. Field-Programmable Gate Arrays discusses the most important aspects of FPGAs in a textbook manner. It provides the reader with a focused view of the key issues, using a consistent notation and style of presentation. It provides detailed descriptions of commercially available FPGAs and an in-depth treatment of the FPGA architecture and CAD issues that are the subjects of current research. The material presented is of interest to a variety of readers, including those who are not familiar with FPGA technology, but wish to be introduced to it, as well as those who already have an understanding of FPGAs, but who are interested in learning about the research directions that are of current interest. |
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Citi izdevumi - Skatīt visu
Field-Programmable Gate Arrays Stephen D. Brown,Robert J. Francis,Jonathan Rose,Zvonko G. Vranesic Ierobežota priekšskatīšana - 2012 |
Field-Programmable Gate Arrays Stephen D. Brown,Robert J. Francis,Jonathan Rose,Zvonko G. Vranesic Priekšskatījums nav pieejams - 2012 |
Bieži izmantoti vārdi un frāzes
1-segment Actel anti-fuse BNRE Boolean network channel densities Chapter Chortle-crf circuit implementing cluster function BDD cost decomposition tree Design detailed routing El Gamal EPROM Equation expanded graphs experimental fanin LUTs fanout fanout nodes Field-Programmable Gate Arrays final circuit flip-flop FPGA routing architectures global routing illustrated in Figure interconnect K-input LUTs logic block BDD logic block pin logic optimization Logic Synthesis lookup table macrocell minimum number MPGA multiplexer NAND gates number of inputs number of logic number of LUTS number of tracks original network output parameters Proc product terms programming technology QuickLogic reconvergent paths replication root LUT routability router routing algorithm routing area routing channels routing delay routing problem routing resources routing switches row-based shown in Figure shows static RAM stuck-at faults subgraph symmetrical FPGAs Technology Mapper technology mapping tion topology total number transistors two-level decomposition values of F variable vertical wire segments X₁ Xilinx
Atsauces uz šo grāmatu
Bio-inspired Computing Machines: Towards Novel Computational Architectures Daniel Mange,Marco Tomassini Ierobežota priekšskatīšana - 1998 |