Fine- and Coarse-Grain Reconfigurable ComputingStamatis Vassiliadis, Dimitrios Soudris Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. |
No grāmatas satura
1.–5. rezultāts no 68.
... logic family), which include except logic and routing, microprocessors, block RAMs etc. In other words, the FPGA ... blocks, depending on the application domain requirements. The platform-based strategy changed the FPGAs role from a ...
... Logic Block Cycles Per Instruction Data Dependency Reuse Graph Direct Memory Access Dynamically Reconfigurable Embedded System Compiler Energy Delay Product Field –Programmable Custom Computing Machines Field-Programmable Gate Arrays ...
... logic block structure, interconnect, and configuration methods are discussed. Qualitative and quantitative ... blocks that communicate through reconfigurable interconnect. By using the appropriate configuration, FPGAs can, in principle, ...
... logic embedded in programmable interconnect. All FPGAs are composed of three fundamental components: logic blocks, I/O blocks and programmable routing. A circuit is implemented in an FPGA by programming each logic block to implement a ...
... logic block architectures, programming technologies, power dissipation and reconfiguration models. Then follows a ... blocks has a strong impact on the characteristics of the FPGA architecture. The arrangement of the logic and ...
Saturs
3 | |
A Survey of CoarseGrain Reconfigurable Architectures and | 60 |
Amdrel | 153 |
A CoarseGrain Dynamically Reconfigurable System | 181 |
Polymorphic Instruction Set Computers | 216 |
Architecture and Compiler for CoarseGrain | 255 |
A Taxonomy of FieldProgrammable Custom Computing Machines | 299 |
Index | 379 |
Citi izdevumi - Skatīt visu
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Ierobežota priekšskatīšana - 2007 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2008 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2014 |