Fine- and Coarse-Grain Reconfigurable ComputingStamatis Vassiliadis, Dimitrios Soudris Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. |
No grāmatas satura
1.–5. rezultāts no 73.
... Dynamically Reconfigurable System and Compilation Framework M. Sanchez-Elez, M. Fernandez, N. Bagherzadeh, R. Hermida, F. Kurdahi, and R. Maestre...................................... 181 5 Polymorphic Instruction Set Computers G ...
... Dynamically Reconfigurable Embedded Systems Application Domain-Specific System Application Specific Integrated Circuits Application – Specific Integrated Processor Custom Configured Unit Control Data Flow Graphs Coarse-Grain ...
... dynamic versus static power consumption as can be seen in Fig. 1.9. The contribution of static power consumption in the total power budget increases as transistor sizes decrease. However, today, dynamic power consumption is still ...
... Dynamic Reconfiguration On the other hand, dynamic reconfiguration [17], also known as run-time reconfiguration, uses a dynamic allocation scheme that re-allocates hardware at run-time. With this technique there is a trade-off between ...
... dynamically-scheduled superscalar processor. The RFU is a small and fast field-programmable gate arraylike device that can implement application specific operations. The Chimaera system is capable of collapsing a set of instructions ...
Saturs
3 | |
A Survey of CoarseGrain Reconfigurable Architectures and | 60 |
Amdrel | 153 |
A CoarseGrain Dynamically Reconfigurable System | 181 |
Polymorphic Instruction Set Computers | 216 |
Architecture and Compiler for CoarseGrain | 255 |
A Taxonomy of FieldProgrammable Custom Computing Machines | 299 |
Index | 379 |
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Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Ierobežota priekšskatīšana - 2007 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2008 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2014 |